diff mbox series

[4/6] nand: brcmnand: add bcm6750 support

Message ID 1583511901-10930-4-git-send-email-philippe.reynes@softathome.com
State Needs Review / ACK
Delegated to: Tom Rini
Headers show
Series [1/6] bcm6750: add initial support | expand

Commit Message

Philippe Reynes March 6, 2020, 4:24 p.m. UTC
This adds the nand support for chipset bcm6750.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
---
 drivers/mtd/nand/raw/Kconfig                 |   6 ++
 drivers/mtd/nand/raw/brcmnand/Makefile       |   1 +
 drivers/mtd/nand/raw/brcmnand/bcm6750_nand.c | 123 +++++++++++++++++++++++++++
 3 files changed, 130 insertions(+)
 create mode 100644 drivers/mtd/nand/raw/brcmnand/bcm6750_nand.c
diff mbox series

Patch

diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 23201ca..3912337 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -78,6 +78,12 @@  config NAND_BRCMNAND_6368
 	help
 	  Enable support for broadcom nand driver on bcm6368.
 
+config NAND_BRCMNAND_6750
+       bool "Support Broadcom NAND controller on bcm6750"
+       depends on NAND_BRCMNAND && ARCH_BCM6750
+       help
+         Enable support for broadcom nand driver on bcm6750.
+
 config NAND_BRCMNAND_68360
        bool "Support Broadcom NAND controller on bcm68360"
        depends on NAND_BRCMNAND && ARCH_BCM68360
diff --git a/drivers/mtd/nand/raw/brcmnand/Makefile b/drivers/mtd/nand/raw/brcmnand/Makefile
index 5d9e7e3..d3b7325 100644
--- a/drivers/mtd/nand/raw/brcmnand/Makefile
+++ b/drivers/mtd/nand/raw/brcmnand/Makefile
@@ -2,6 +2,7 @@ 
 
 obj-$(CONFIG_NAND_BRCMNAND_6368) += bcm6368_nand.o
 obj-$(CONFIG_NAND_BRCMNAND_63158) += bcm63158_nand.o
+obj-$(CONFIG_NAND_BRCMNAND_6750) += bcm6750_nand.o
 obj-$(CONFIG_NAND_BRCMNAND_68360) += bcm68360_nand.o
 obj-$(CONFIG_NAND_BRCMNAND_6838) += bcm6838_nand.o
 obj-$(CONFIG_NAND_BRCMNAND_6858) += bcm6858_nand.o
diff --git a/drivers/mtd/nand/raw/brcmnand/bcm6750_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm6750_nand.c
new file mode 100644
index 0000000..22355fb
--- /dev/null
+++ b/drivers/mtd/nand/raw/brcmnand/bcm6750_nand.c
@@ -0,0 +1,123 @@ 
+// SPDX-License-Identifier: GPL-2.0+
+
+#include <common.h>
+#include <asm/io.h>
+#include <memalign.h>
+#include <nand.h>
+#include <linux/errno.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <dm.h>
+
+#include "brcmnand.h"
+
+struct bcm6750_nand_soc {
+	struct brcmnand_soc soc;
+	void __iomem *base;
+};
+
+#define BCM6750_NAND_INT		0x00
+#define BCM6750_NAND_STATUS_SHIFT	0
+#define BCM6750_NAND_STATUS_MASK	(0xfff << BCM6750_NAND_STATUS_SHIFT)
+
+#define BCM6750_NAND_INT_EN		0x04
+#define BCM6750_NAND_ENABLE_SHIFT	0
+#define BCM6750_NAND_ENABLE_MASK	(0xffff << BCM6750_NAND_ENABLE_SHIFT)
+
+enum {
+	BCM6750_NP_READ		= BIT(0),
+	BCM6750_BLOCK_ERASE	= BIT(1),
+	BCM6750_COPY_BACK	= BIT(2),
+	BCM6750_PAGE_PGM	= BIT(3),
+	BCM6750_CTRL_READY	= BIT(4),
+	BCM6750_DEV_RBPIN	= BIT(5),
+	BCM6750_ECC_ERR_UNC	= BIT(6),
+	BCM6750_ECC_ERR_CORR	= BIT(7),
+};
+
+static bool bcm6750_nand_intc_ack(struct brcmnand_soc *soc)
+{
+	struct bcm6750_nand_soc *priv =
+			container_of(soc, struct bcm6750_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM6750_NAND_INT;
+	u32 val = brcmnand_readl(mmio);
+
+	if (val & (BCM6750_CTRL_READY << BCM6750_NAND_STATUS_SHIFT)) {
+		/* Ack interrupt */
+		val &= ~BCM6750_NAND_STATUS_MASK;
+		val |= BCM6750_CTRL_READY << BCM6750_NAND_STATUS_SHIFT;
+		brcmnand_writel(val, mmio);
+		return true;
+	}
+
+	return false;
+}
+
+static void bcm6750_nand_intc_set(struct brcmnand_soc *soc, bool en)
+{
+	struct bcm6750_nand_soc *priv =
+			container_of(soc, struct bcm6750_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM6750_NAND_INT_EN;
+	u32 val = brcmnand_readl(mmio);
+
+	/* Don't ack any interrupts */
+	val &= ~BCM6750_NAND_STATUS_MASK;
+
+	if (en)
+		val |= BCM6750_CTRL_READY << BCM6750_NAND_ENABLE_SHIFT;
+	else
+		val &= ~(BCM6750_CTRL_READY << BCM6750_NAND_ENABLE_SHIFT);
+
+	brcmnand_writel(val, mmio);
+}
+
+static int bcm6750_nand_probe(struct udevice *dev)
+{
+	struct udevice *pdev = dev;
+	struct bcm6750_nand_soc *priv = dev_get_priv(dev);
+	struct brcmnand_soc *soc;
+	struct resource res;
+
+	soc = &priv->soc;
+
+	dev_read_resource_byname(pdev, "nand-int-base", &res);
+	priv->base = devm_ioremap(dev, res.start, resource_size(&res));
+	if (IS_ERR(priv->base))
+		return PTR_ERR(priv->base);
+
+	soc->ctlrdy_ack = bcm6750_nand_intc_ack;
+	soc->ctlrdy_set_enabled = bcm6750_nand_intc_set;
+
+	/* Disable and ack all interrupts  */
+	brcmnand_writel(0, priv->base + BCM6750_NAND_INT_EN);
+	brcmnand_writel(0, priv->base + BCM6750_NAND_INT);
+
+	return brcmnand_probe(pdev, soc);
+}
+
+static const struct udevice_id bcm6750_nand_dt_ids[] = {
+	{
+		.compatible = "brcm,nand-bcm6750",
+	},
+	{ /* sentinel */ }
+};
+
+U_BOOT_DRIVER(bcm6750_nand) = {
+	.name = "bcm6750-nand",
+	.id = UCLASS_MTD,
+	.of_match = bcm6750_nand_dt_ids,
+	.probe = bcm6750_nand_probe,
+	.priv_auto_alloc_size = sizeof(struct bcm6750_nand_soc),
+};
+
+void board_nand_init(void)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_MTD,
+					  DM_GET_DRIVER(bcm6750_nand), &dev);
+	if (ret && ret != -ENODEV)
+		pr_err("Failed to initialize %s. (error %d)\n", dev->name,
+		       ret);
+}