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[147.11.224.80]) by smtp.gmail.com with ESMTPSA id q1sm39859821pfn.178.2019.07.18.00.35.14 (version=TLS1 cipher=AES128-SHA bits=128/128); Thu, 18 Jul 2019 00:35:14 -0700 (PDT) From: Bin Meng To: Tom Rini , Simon Glass , Wolfgang Denk , Heinrich Schuchardt , Mario Six , U-Boot Mailing List Date: Thu, 18 Jul 2019 00:34:16 -0700 Message-Id: <1563435275-22326-32-git-send-email-bmeng.cn@gmail.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1563435275-22326-1-git-send-email-bmeng.cn@gmail.com> References: <1563435275-22326-1-git-send-email-bmeng.cn@gmail.com> Subject: [U-Boot] [PATCH 31/50] doc: board: Convert README.qemu-riscv to reST X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Convert plain text documentation to reStructuredText format and add it to Sphinx TOC tree. No essential content change. Signed-off-by: Bin Meng --- doc/board/emulation/index.rst | 1 + .../emulation/qemu-riscv.rst} | 21 ++++++++++++--------- 2 files changed, 13 insertions(+), 9 deletions(-) rename doc/{README.qemu-riscv => board/emulation/qemu-riscv.rst} (82%) diff --git a/doc/board/emulation/index.rst b/doc/board/emulation/index.rst index a2b1a60..7537179 100644 --- a/doc/board/emulation/index.rst +++ b/doc/board/emulation/index.rst @@ -7,4 +7,5 @@ Emulation :maxdepth: 2 qemu-arm + qemu-riscv qemu-x86 diff --git a/doc/README.qemu-riscv b/doc/board/emulation/qemu-riscv.rst similarity index 82% rename from doc/README.qemu-riscv rename to doc/board/emulation/qemu-riscv.rst index e2e4804..2148334 100644 --- a/doc/README.qemu-riscv +++ b/doc/board/emulation/qemu-riscv.rst @@ -1,9 +1,8 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2018, Bin Meng +.. SPDX-License-Identifier: GPL-2.0+ +.. Copyright (C) 2018, Bin Meng -U-Boot on QEMU's 'virt' machine on RISC-V -========================================= +QEMU RISC-V +=========== QEMU for RISC-V supports a special 'virt' machine designed for emulation and virtualization purposes. This document describes how to run U-Boot under it. @@ -19,11 +18,13 @@ Building U-Boot --------------- Set the CROSS_COMPILE environment variable as usual, and run: -- For 32-bit RISC-V: +- For 32-bit RISC-V:: + make qemu-riscv32_defconfig make -- For 64-bit RISC-V: +- For 64-bit RISC-V:: + make qemu-riscv64_defconfig make @@ -31,10 +32,12 @@ Running U-Boot -------------- The minimal QEMU command line to get U-Boot up and running is: -- For 32-bit RISC-V: +- For 32-bit RISC-V:: + qemu-system-riscv32 -nographic -machine virt -kernel u-boot -- For 64-bit RISC-V: +- For 64-bit RISC-V:: + qemu-system-riscv64 -nographic -machine virt -kernel u-boot The commands above create targets with 128MiB memory by default.