diff mbox series

[U-Boot] fsl-layerscape/ls1046a_serdes.c: add 0x3040 serdes1 setting

Message ID 1559311895-1881-1-git-send-email-maciej.pijanowski@3mdeb.com
State Accepted
Commit c34d8dcb3ed7f4c2b09d1cb7d5dc534d0c7aeae3
Delegated to: Prabhakar Kushwaha
Headers show
Series [U-Boot] fsl-layerscape/ls1046a_serdes.c: add 0x3040 serdes1 setting | expand

Commit Message

Maciej Pijanowski May 31, 2019, 2:11 p.m. UTC
According to the table 31-1 in the QorIQ LS1046A Reference Manual,
Rev. 2, 11/2018, the 0x3040 is also a valid setting for the SerDes1.
With the current codebase, following message appears when 0x3040 is
used:

SERDES1[PRTCL] = 0x3040 is not valid

Signed-off-by: Maciej Pijanowski <maciej.pijanowski@3mdeb.com>

Cc: prabhakar.kushwaha@nxp.com
Cc: piotr.krol@3mdeb.com
---
 arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Prabhakar Kushwaha June 19, 2019, 11:42 a.m. UTC | #1
> -----Original Message-----
> From: Maciej Pijanowski <maciej.pijanowski@3mdeb.com>
> Sent: Friday, May 31, 2019 7:42 PM
> To: u-boot@lists.denx.de
> Cc: piotr.krol@3mdeb.com; Maciej Pijanowski
> <maciej.pijanowski@3mdeb.com>; Prabhakar Kushwaha
> <prabhakar.kushwaha@nxp.com>
> Subject: [PATCH] fsl-layerscape/ls1046a_serdes.c: add 0x3040 serdes1 setting
> 
> According to the table 31-1 in the QorIQ LS1046A Reference Manual, Rev. 2,
> 11/2018, the 0x3040 is also a valid setting for the SerDes1.
> With the current codebase, following message appears when 0x3040 is
> used:
> 
> SERDES1[PRTCL] = 0x3040 is not valid
> 
> Signed-off-by: Maciej Pijanowski <maciej.pijanowski@3mdeb.com>
> 
> Cc: prabhakar.kushwaha@nxp.com
> Cc: piotr.krol@3mdeb.com
> ---

Updated description
This patch has been applied to fsl-qoriq master, awaiting upstream.

--pk
diff mbox series

Patch

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c
index 91de5ff0d3da..12775c65433b 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c
@@ -33,6 +33,7 @@  static struct serdes_config serdes1_cfg_tbl[] = {
 		  SGMII_FM1_DTSEC6} },
 	{0x2223, {SGMII_2500_FM1_DTSEC9, SGMII_2500_FM1_DTSEC10,
 		  SGMII_2500_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
+	{0x3040, {SGMII_FM1_DTSEC9, NONE, QSGMII_FM1_A, NONE} },
 	{}
 };