Message ID | 1553245508-8577-1-git-send-email-ley.foon.tan@intel.com |
---|---|
State | Superseded |
Delegated to: | Marek Vasut |
Headers | show |
Series | [U-Boot] arm: dts: Stratix10: Add QSPI node | expand |
On Fri, Mar 22, 2019 at 5:05 PM Ley Foon Tan <ley.foon.tan@intel.com> wrote: > > Add QSPI device tree to Stratix 10. > Sync from Linux Stratix 10 dts. > > Tested on Stratix 10 SoC devkit. > SOCFPGA_STRATIX10 # sf probe 0:0 > SF: Detected mt25qu02g with page size 256 Bytes, erase size 64 KiB, total 256 MiB > > Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> > --- > arch/arm/dts/socfpga_stratix10.dtsi | 16 ++++++++++++++++ > arch/arm/dts/socfpga_stratix10_socdk.dts | 21 +++++++++++++++++++++ > 2 files changed, 37 insertions(+) > > diff --git a/arch/arm/dts/socfpga_stratix10.dtsi b/arch/arm/dts/socfpga_stratix10.dtsi > index ee93725d64..1690f0e0bb 100644 > --- a/arch/arm/dts/socfpga_stratix10.dtsi > +++ b/arch/arm/dts/socfpga_stratix10.dtsi > @@ -391,5 +391,21 @@ > resets = <&rst WATCHDOG3_RESET>; > status = "disabled"; > }; > + > + qspi: spi@ff8d2000 { > + compatible = "cdns,qspi-nor"; > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0xff8d2000 0x100>, > + <0xff900000 0x100000>; > + interrupts = <0 3 4>; > + cdns,fifo-depth = <128>; > + cdns,fifo-width = <4>; > + cdns,trigger-address = <0x00000000>; > + bus-num = <0>; > + /*spi-max-frequency = <50000000>;*/ Please ignore this patch. Just noticed add this unused /* */ line here. Will resend again. Regards Ley Foon
On 3/22/19 10:08 AM, Ley Foon Tan wrote: > On Fri, Mar 22, 2019 at 5:05 PM Ley Foon Tan <ley.foon.tan@intel.com> wrote: >> >> Add QSPI device tree to Stratix 10. >> Sync from Linux Stratix 10 dts. >> >> Tested on Stratix 10 SoC devkit. >> SOCFPGA_STRATIX10 # sf probe 0:0 >> SF: Detected mt25qu02g with page size 256 Bytes, erase size 64 KiB, total 256 MiB >> >> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> >> --- >> arch/arm/dts/socfpga_stratix10.dtsi | 16 ++++++++++++++++ >> arch/arm/dts/socfpga_stratix10_socdk.dts | 21 +++++++++++++++++++++ >> 2 files changed, 37 insertions(+) >> >> diff --git a/arch/arm/dts/socfpga_stratix10.dtsi b/arch/arm/dts/socfpga_stratix10.dtsi >> index ee93725d64..1690f0e0bb 100644 >> --- a/arch/arm/dts/socfpga_stratix10.dtsi >> +++ b/arch/arm/dts/socfpga_stratix10.dtsi >> @@ -391,5 +391,21 @@ >> resets = <&rst WATCHDOG3_RESET>; >> status = "disabled"; >> }; >> + >> + qspi: spi@ff8d2000 { >> + compatible = "cdns,qspi-nor"; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + reg = <0xff8d2000 0x100>, >> + <0xff900000 0x100000>; >> + interrupts = <0 3 4>; >> + cdns,fifo-depth = <128>; >> + cdns,fifo-width = <4>; >> + cdns,trigger-address = <0x00000000>; >> + bus-num = <0>; >> + /*spi-max-frequency = <50000000>;*/ > Please ignore this patch. Just noticed add this unused /* */ line here. > Will resend again. Then it'd be V2 .
On Fri, Mar 22, 2019 at 10:05 AM Ley Foon Tan <ley.foon.tan@intel.com> wrote: > > Add QSPI device tree to Stratix 10. > Sync from Linux Stratix 10 dts. > > Tested on Stratix 10 SoC devkit. > SOCFPGA_STRATIX10 # sf probe 0:0 > SF: Detected mt25qu02g with page size 256 Bytes, erase size 64 KiB, total 256 MiB > > Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> > --- > arch/arm/dts/socfpga_stratix10.dtsi | 16 ++++++++++++++++ > arch/arm/dts/socfpga_stratix10_socdk.dts | 21 +++++++++++++++++++++ > 2 files changed, 37 insertions(+) > > diff --git a/arch/arm/dts/socfpga_stratix10.dtsi b/arch/arm/dts/socfpga_stratix10.dtsi > index ee93725d64..1690f0e0bb 100644 > --- a/arch/arm/dts/socfpga_stratix10.dtsi > +++ b/arch/arm/dts/socfpga_stratix10.dtsi > @@ -391,5 +391,21 @@ > resets = <&rst WATCHDOG3_RESET>; > status = "disabled"; > }; > + > + qspi: spi@ff8d2000 { > + compatible = "cdns,qspi-nor"; > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0xff8d2000 0x100>, > + <0xff900000 0x100000>; > + interrupts = <0 3 4>; > + cdns,fifo-depth = <128>; > + cdns,fifo-width = <4>; > + cdns,trigger-address = <0x00000000>; > + bus-num = <0>; > + /*spi-max-frequency = <50000000>;*/ > + status = "disabled"; > + u-boot,dm-pre-reloc; > + }; > }; > }; > diff --git a/arch/arm/dts/socfpga_stratix10_socdk.dts b/arch/arm/dts/socfpga_stratix10_socdk.dts > index c59b77d829..4c47415b51 100644 > --- a/arch/arm/dts/socfpga_stratix10_socdk.dts > +++ b/arch/arm/dts/socfpga_stratix10_socdk.dts > @@ -10,6 +10,7 @@ > > aliases { > serial0 = &uart0; > + spi0 = &qspi; > }; > > chosen { > @@ -87,6 +88,26 @@ > smplsel = <0>; > }; > > +&qspi { > + status = "okay"; > + > + flash@0 { > + u-boot,dm-pre-reloc; > + #address-cells = <1>; > + #size-cells = <1>; > + compatible = "spi-flash"; "spi-flash" is u-boot specific and about to be deprecated. You should use the linux-compatible "jedec,spi-nor" binding. Regards, Simon > + reg = <0>; /* chip select */ > + spi-max-frequency = <50000000>; > + > + page-size = <256>; > + block-size = <16>; /* 2^16, 64KB */ > + cdns,tshsl-ns = <50>; > + cdns,tsd2d-ns = <50>; > + cdns,tchsh-ns = <4>; > + cdns,tslch-ns = <4>; > + }; > +}; > + > &uart0 { > status = "okay"; > }; > -- > 2.19.0
On Fri, Mar 22, 2019 at 7:39 PM Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> wrote: > > On Fri, Mar 22, 2019 at 10:05 AM Ley Foon Tan <ley.foon.tan@intel.com> wrote: > > > > Add QSPI device tree to Stratix 10. > > Sync from Linux Stratix 10 dts. > > > > Tested on Stratix 10 SoC devkit. > > SOCFPGA_STRATIX10 # sf probe 0:0 > > SF: Detected mt25qu02g with page size 256 Bytes, erase size 64 KiB, total 256 MiB > > > > Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> > > --- > > arch/arm/dts/socfpga_stratix10.dtsi | 16 ++++++++++++++++ > > arch/arm/dts/socfpga_stratix10_socdk.dts | 21 +++++++++++++++++++++ > > 2 files changed, 37 insertions(+) > > > > diff --git a/arch/arm/dts/socfpga_stratix10.dtsi b/arch/arm/dts/socfpga_stratix10.dtsi > > index ee93725d64..1690f0e0bb 100644 > > --- a/arch/arm/dts/socfpga_stratix10.dtsi > > +++ b/arch/arm/dts/socfpga_stratix10.dtsi > > @@ -391,5 +391,21 @@ > > resets = <&rst WATCHDOG3_RESET>; > > status = "disabled"; > > }; > > + > > + qspi: spi@ff8d2000 { > > + compatible = "cdns,qspi-nor"; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + reg = <0xff8d2000 0x100>, > > + <0xff900000 0x100000>; > > + interrupts = <0 3 4>; > > + cdns,fifo-depth = <128>; > > + cdns,fifo-width = <4>; > > + cdns,trigger-address = <0x00000000>; > > + bus-num = <0>; > > + /*spi-max-frequency = <50000000>;*/ > > + status = "disabled"; > > + u-boot,dm-pre-reloc; > > + }; > > }; > > }; > > diff --git a/arch/arm/dts/socfpga_stratix10_socdk.dts b/arch/arm/dts/socfpga_stratix10_socdk.dts > > index c59b77d829..4c47415b51 100644 > > --- a/arch/arm/dts/socfpga_stratix10_socdk.dts > > +++ b/arch/arm/dts/socfpga_stratix10_socdk.dts > > @@ -10,6 +10,7 @@ > > > > aliases { > > serial0 = &uart0; > > + spi0 = &qspi; > > }; > > > > chosen { > > @@ -87,6 +88,26 @@ > > smplsel = <0>; > > }; > > > > +&qspi { > > + status = "okay"; > > + > > + flash@0 { > > + u-boot,dm-pre-reloc; > > + #address-cells = <1>; > > + #size-cells = <1>; > > + compatible = "spi-flash"; > > "spi-flash" is u-boot specific and about to be deprecated. You should use > the linux-compatible "jedec,spi-nor" binding. Okay, will change in next revision. Regards Ley Foon
diff --git a/arch/arm/dts/socfpga_stratix10.dtsi b/arch/arm/dts/socfpga_stratix10.dtsi index ee93725d64..1690f0e0bb 100644 --- a/arch/arm/dts/socfpga_stratix10.dtsi +++ b/arch/arm/dts/socfpga_stratix10.dtsi @@ -391,5 +391,21 @@ resets = <&rst WATCHDOG3_RESET>; status = "disabled"; }; + + qspi: spi@ff8d2000 { + compatible = "cdns,qspi-nor"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xff8d2000 0x100>, + <0xff900000 0x100000>; + interrupts = <0 3 4>; + cdns,fifo-depth = <128>; + cdns,fifo-width = <4>; + cdns,trigger-address = <0x00000000>; + bus-num = <0>; + /*spi-max-frequency = <50000000>;*/ + status = "disabled"; + u-boot,dm-pre-reloc; + }; }; }; diff --git a/arch/arm/dts/socfpga_stratix10_socdk.dts b/arch/arm/dts/socfpga_stratix10_socdk.dts index c59b77d829..4c47415b51 100644 --- a/arch/arm/dts/socfpga_stratix10_socdk.dts +++ b/arch/arm/dts/socfpga_stratix10_socdk.dts @@ -10,6 +10,7 @@ aliases { serial0 = &uart0; + spi0 = &qspi; }; chosen { @@ -87,6 +88,26 @@ smplsel = <0>; }; +&qspi { + status = "okay"; + + flash@0 { + u-boot,dm-pre-reloc; + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + reg = <0>; /* chip select */ + spi-max-frequency = <50000000>; + + page-size = <256>; + block-size = <16>; /* 2^16, 64KB */ + cdns,tshsl-ns = <50>; + cdns,tsd2d-ns = <50>; + cdns,tchsh-ns = <4>; + cdns,tslch-ns = <4>; + }; +}; + &uart0 { status = "okay"; };
Add QSPI device tree to Stratix 10. Sync from Linux Stratix 10 dts. Tested on Stratix 10 SoC devkit. SOCFPGA_STRATIX10 # sf probe 0:0 SF: Detected mt25qu02g with page size 256 Bytes, erase size 64 KiB, total 256 MiB Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> --- arch/arm/dts/socfpga_stratix10.dtsi | 16 ++++++++++++++++ arch/arm/dts/socfpga_stratix10_socdk.dts | 21 +++++++++++++++++++++ 2 files changed, 37 insertions(+)