From patchwork Thu Mar 21 17:24:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ley Foon Tan X-Patchwork-Id: 1059911 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 44Q1b375Crz9sNk for ; Thu, 21 Mar 2019 20:24:47 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 91409C2202F; Thu, 21 Mar 2019 09:24:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id E9FBDC22082; Thu, 21 Mar 2019 09:24:24 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 01C25C22060; Thu, 21 Mar 2019 09:24:20 +0000 (UTC) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lists.denx.de (Postfix) with ESMTPS id C203AC22074 for ; Thu, 21 Mar 2019 09:24:16 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 21 Mar 2019 02:24:14 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,252,1549958400"; d="scan'208";a="309081228" Received: from lftan-mobl.gar.corp.intel.com (HELO ubuntu) ([10.226.248.85]) by orsmga005.jf.intel.com with SMTP; 21 Mar 2019 02:24:12 -0700 Received: by ubuntu (sSMTP sendmail emulation); Fri, 22 Mar 2019 01:24:10 +0800 From: Ley Foon Tan To: u-boot@lists.denx.de, Marek Vasut Date: Fri, 22 Mar 2019 01:24:00 +0800 Message-Id: <1553189045-4681-2-git-send-email-ley.foon.tan@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1553189045-4681-1-git-send-email-ley.foon.tan@intel.com> References: <1553189045-4681-1-git-send-email-ley.foon.tan@intel.com> Cc: Chin Liang See , Dalon Westergreen Subject: [U-Boot] [PATCH v2 1/6] ddr: altera: stratix10: Move SDRAM size check to SDRAM driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Move SDRAM size check to SDRAM driver. sdram_calculate_size() is called in SDRAM initialization already, avoid calling twice in size check function. Signed-off-by: Ley Foon Tan --- arch/arm/mach-socfpga/spl_s10.c | 11 ----------- drivers/ddr/altera/sdram_s10.c | 15 +++++++++++++++ 2 files changed, 15 insertions(+), 11 deletions(-) diff --git a/arch/arm/mach-socfpga/spl_s10.c b/arch/arm/mach-socfpga/spl_s10.c index a3db20a819..a141ffe82a 100644 --- a/arch/arm/mach-socfpga/spl_s10.c +++ b/arch/arm/mach-socfpga/spl_s10.c @@ -181,17 +181,6 @@ void board_init_f(ulong dummy) hang(); } - gd->ram_size = sdram_calculate_size(); - printf("DDR: %d MiB\n", (int)(gd->ram_size >> 20)); - - /* Sanity check ensure correct SDRAM size specified */ - debug("DDR: Running SDRAM size sanity check\n"); - if (get_ram_size(0, gd->ram_size) != gd->ram_size) { - puts("DDR: SDRAM size check failed!\n"); - hang(); - } - debug("DDR: SDRAM size check passed!\n"); - mbox_init(); #ifdef CONFIG_CADENCE_QSPI diff --git a/drivers/ddr/altera/sdram_s10.c b/drivers/ddr/altera/sdram_s10.c index a48567c109..033ccca437 100644 --- a/drivers/ddr/altera/sdram_s10.c +++ b/drivers/ddr/altera/sdram_s10.c @@ -134,6 +134,17 @@ static int poll_hmc_clock_status(void) SYSMGR_HMC_CLK_STATUS_MSK, true, 1000, false); } +static void sdram_size_check(void) +{ + /* Sanity check ensure correct SDRAM size specified */ + debug("DDR: Running SDRAM size sanity check\n"); + if (get_ram_size(0, gd->ram_size) != gd->ram_size) { + puts("DDR: SDRAM size check failed!\n"); + hang(); + } + debug("DDR: SDRAM size check passed!\n"); +} + /** * sdram_mmr_init_full() - Function to initialize SDRAM MMR * @@ -339,6 +350,8 @@ int sdram_mmr_init_full(unsigned int unused) else gd->ram_size = size; + printf("DDR: %lld MiB\n", gd->ram_size >> 20); + /* Enable or disable the SDRAM ECC */ if (CTRLCFG1_CFG_CTRL_EN_ECC(ctrlcfg1)) { setbits_le32(SOCFPGA_SDR_ADDRESS + ECCCTRL1, @@ -361,6 +374,8 @@ int sdram_mmr_init_full(unsigned int unused) DDR_HMC_ECCCTL2_AWB_EN_SET_MSK)); } + sdram_size_check(); + debug("DDR: HMC init success\n"); return 0; }