diff mbox series

[U-Boot,4/6] ARM: dts: socfpga: Add missing SDMMC reset

Message ID 1546157627-45489-5-git-send-email-tien.fong.chee@intel.com
State Accepted
Commit 70cae47014c270515b2e60b81094b219eb693add
Delegated to: Marek Vasut
Headers show
Series Add support for loading FPGA bitstream | expand

Commit Message

Chee, Tien Fong Dec. 30, 2018, 8:13 a.m. UTC 
From: Tien Fong Chee <tien.fong.chee@intel.com>

The SDMMC reset is missing from DT, so the reset manager cannot unreset
the SDMMC. Add the missing DT reset entry.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
---
 arch/arm/dts/socfpga_arria10.dtsi |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

Comments

Marek Vasut Dec. 30, 2018, 3:48 p.m. UTC | #1 
On 12/30/18 9:13 AM, tien.fong.chee@intel.com wrote:
> From: Tien Fong Chee <tien.fong.chee@intel.com>
> 
> The SDMMC reset is missing from DT, so the reset manager cannot unreset
> the SDMMC. Add the missing DT reset entry.
> 
> Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
> ---
>  arch/arm/dts/socfpga_arria10.dtsi |    1 +
>  1 files changed, 1 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/dts/socfpga_arria10.dtsi b/arch/arm/dts/socfpga_arria10.dtsi
> index 2c5249c..c11a5c0 100644
> --- a/arch/arm/dts/socfpga_arria10.dtsi
> +++ b/arch/arm/dts/socfpga_arria10.dtsi
> @@ -660,6 +660,7 @@
>  			fifo-depth = <0x400>;
>  			clocks = <&l4_mp_clk>, <&sdmmc_clk>;
>  			clock-names = "biu", "ciu";
> +			resets = <&rst SDMMC_RESET>;
>  			status = "disabled";
>  		};
>  
> 
Applied, thanks
diff mbox series

Patch

diff --git a/arch/arm/dts/socfpga_arria10.dtsi b/arch/arm/dts/socfpga_arria10.dtsi
index 2c5249c..c11a5c0 100644
--- a/arch/arm/dts/socfpga_arria10.dtsi
+++ b/arch/arm/dts/socfpga_arria10.dtsi
@@ -660,6 +660,7 @@ 
 			fifo-depth = <0x400>;
 			clocks = <&l4_mp_clk>, <&sdmmc_clk>;
 			clock-names = "biu", "ciu";
+			resets = <&rst SDMMC_RESET>;
 			status = "disabled";
 		};