From patchwork Fri Oct 19 15:40:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: cniedermaier@dh-electronics.de X-Patchwork-Id: 986982 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=dh-electronics.de Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 42cDfQ1959z9s3T for ; Sat, 20 Oct 2018 05:17:29 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 83521C21C8B; Fri, 19 Oct 2018 18:17:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id F1C96C21C27; Fri, 19 Oct 2018 18:17:21 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 24A3BC21C27; Fri, 19 Oct 2018 15:40:57 +0000 (UTC) Received: from mout.kundenserver.de (mout.kundenserver.de [212.227.126.130]) by lists.denx.de (Postfix) with ESMTPS id CA6D7C21BE5 for ; Fri, 19 Oct 2018 15:40:56 +0000 (UTC) Received: from sun05.dh.corp ([188.193.90.127]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.167]) with ESMTPA (Nemesis) id 1MmQUL-1fmgTB0Z4T-00iQbN; Fri, 19 Oct 2018 17:40:56 +0200 Received: from sun05.dh.corp ([188.193.90.127]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.167]) with ESMTPA (Nemesis) id 1MmQUL-1fmgTB0Z4T-00iQbN; Fri, 19 Oct 2018 17:40:56 +0200 Received: from sun1049.dh.corp (unknown [10.64.9.49]) by sun05.dh.corp (Postfix) with ESMTP id 59B771FA3E; Fri, 19 Oct 2018 17:40:48 +0200 (CEST) Received: from localhost (10.64.31.103) by sun1049.dh.corp (10.64.9.49) with Microsoft SMTP Server id 14.3.408.0; Fri, 19 Oct 2018 17:40:54 +0200 From: To: Date: Fri, 19 Oct 2018 17:40:54 +0200 Message-ID: <1539963654-23947-1-git-send-email-cniedermaier@dh-electronics.de> X-Mailer: git-send-email 2.1.4 MIME-Version: 1.0 X-Originating-IP: [10.64.31.103] X-Provags-ID: V03:K1:s+cfAPELNMoc6Q4TFKWo9Adp1+DapxampnrUpVEs7tC3omgDIyW fLQnHpgeTmm/JMgWK9fR+/LNTv8N/yg/P5W1lDVIHHyfxCjjSGvceL/z7WksII9RL51Rgcd JbyZUXQ+7l7Ks8NN79WhDIcTdFwySb1tYX4nwwJEsd8cZC0VmdzCttfF8ghDhybVx0SvZhT u1pLUfT+qK6G+04ojNVTw== X-UI-Out-Filterresults: notjunk:1; V01:K0:cx9tSSePwrk=:9hFU8v8JBzGQaK5YmprnS9 IdAGCoYiKTpIbp3iICOsXR8pICeIBK1vc5aQb1GZIFx8lxKpdUF1s+Oz2p5EnwzpugRpWk4OW qSVGbMtmmDE+07j4rnjScysP6MjH7fHOIPsF/w650KOKf6L/x50YC5TbXVnby12xAgseFyl7r ZaMZnuqeOd+7kBWSbcW1FfbAaRBsyjuA4ZffzvKoDDzSMXySZqpIASFejlnoNR5SrJ7FKtPwx eEwpeUs92l8+Xe8k3CxjY2zpf6/LVL0iLyaiKFViXf5ED9v4iQXIISzWLpeEAI+cZXwmc58hs oDFnUxBSAY2jGeTKZ1MFX/Uq9CeIF6s0UCr1/02SeWAnGpweDdm8zKi+SsuNK9xaSZR3S9LVO bsq+CldT/H+v1gt0MLMOTACVUIblxQEj7uwgZQN3IgMa+zsKVlBX3oC1m+EhBz1y29cK3c6v8 0yPJhjq9VJqdjRG5Wpr2pJbXXMe9LTmirWIdQb62Ki0y/2Bqs8d6X/rg+GbKuzG068hni7mtL gJtrYcNAIQSro3z90hNT4GuwVVQ++GtHcxpvYAoUVuianrneSGyCRULChGsRSkIFzndCfPfD2 R41XSi1r/XhzH7E/TYjJluhciM56jYIvuYFaAkIgvk4+izuz4Ed5B3sPymw98IhLwDEenHDqM cFtaiYlAEr4d2ZUqxjAg7ZDkujemv7cgN60Y1hoCLVWhQJMQhPxYQYRiPAj/jX35BekxeQFJl yEhQrnqKgbqFvphR X-Mailman-Approved-At: Fri, 19 Oct 2018 18:17:20 +0000 Subject: [U-Boot] [PATCH] imx: imx6: perform gpr_init only on suitable cpu types X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Christoph Niedermaier If the function gpr_init is used in a common MX6 spl implementation we have to ensure that it is only called for suitable cpu types, otherwise it breaks hardware parts like enet1, can1, can2, etc. Signed-off-by: Christoph Niedermaier --- arch/arm/mach-imx/mx6/soc.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c index 31c9a6e..e80f1d4 100644 --- a/arch/arm/mach-imx/mx6/soc.c +++ b/arch/arm/mach-imx/mx6/soc.c @@ -660,6 +660,14 @@ void gpr_init(void) { struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; + /* + * If this function is used in a common MX6 spl implementation + * we have to ensure that it is only called for suitable cpu types, + * otherwise it breaks hardware parts like enet1, can1, can2, etc. + */ + if (!is_mx6dqp() && !is_mx6dq() && !is_mx6sdl()) + return; + /* enable AXI cache for VDOA/VPU/IPU */ writel(0xF00000CF, &iomux->gpr[4]); if (is_mx6dqp()) {