diff --git a/arch/arm/mach-rockchip/rk3368-board-spl.c b/arch/arm/mach-rockchip/rk3368-board-spl.c
deleted file mode 100644
index 8055ae5..0000000
--- a/arch/arm/mach-rockchip/rk3368-board-spl.c
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <debug_uart.h>
-#include <dm.h>
-#include <dm/pinctrl.h>
-#include <ram.h>
-#include <spl.h>
-#include <asm/io.h>
-#include <asm/arch/cru_rk3368.h>
-#include <asm/arch/grf_rk3368.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/periph.h>
-#include <asm/arch/timer.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-void board_debug_uart_init(void)
-{
-}
-
-void board_init_f(ulong dummy)
-{
-	struct udevice *pinctrl;
-	struct udevice *dev;
-	int ret;
-
-	ret = spl_early_init();
-	if (ret) {
-		debug("spl_early_init() failed: %d\n", ret);
-		hang();
-	}
-
-	/* Set up our preloader console */
-	ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
-	if (ret) {
-		pr_err("%s: pinctrl init failed: %d\n", __func__, ret);
-		hang();
-	}
-
-	ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART0);
-	if (ret) {
-		pr_err("%s: failed to set up console UART\n", __func__);
-		hang();
-	}
-
-	preloader_console_init();
-
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		debug("DRAM init failed: %d\n", ret);
-		return;
-	}
-}
-
-u32 spl_boot_device(void)
-{
-	return BOOT_DEVICE_MMC1;
-}
-
-#ifdef CONFIG_SPL_LOAD_FIT
-int board_fit_config_name_match(const char *name)
-{
-	/* Just empty function now - can't decide what to choose */
-	debug("%s: %s\n", __func__, name);
-
-	return 0;
-}
-#endif
diff --git a/arch/arm/mach-rockchip/rk3368-board-tpl.c b/arch/arm/mach-rockchip/rk3368-board-tpl.c
deleted file mode 100644
index 60d5aea..0000000
--- a/arch/arm/mach-rockchip/rk3368-board-tpl.c
+++ /dev/null
@@ -1,157 +0,0 @@
-/*
- * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
- *
- * SPDX-License-Identifier:     GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/arch/clock.h>
-#include <debug_uart.h>
-#include <dm.h>
-#include <ram.h>
-#include <spl.h>
-#include <asm/io.h>
-#include <asm/arch/bootrom.h>
-#include <asm/arch/cru_rk3368.h>
-#include <asm/arch/grf_rk3368.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/timer.h>
-#include <syscon.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/*
- * The SPL (and also the full U-Boot stage on the RK3368) will run in
- * secure mode (i.e. EL3) and an ATF will eventually be booted before
- * starting up the operating system... so we can initialize the SGRF
- * here and rely on the ATF installing the final (secure) policy
- * later.
- */
-static inline uintptr_t sgrf_soc_con_addr(unsigned no)
-{
-	const uintptr_t SGRF_BASE =
-		(uintptr_t)syscon_get_first_range(ROCKCHIP_SYSCON_SGRF);
-
-	return SGRF_BASE + sizeof(u32) * no;
-}
-
-static inline uintptr_t sgrf_busdmac_addr(unsigned no)
-{
-	const uintptr_t SGRF_BASE =
-		(uintptr_t)syscon_get_first_range(ROCKCHIP_SYSCON_SGRF);
-	const uintptr_t SGRF_BUSDMAC_OFFSET = 0x100;
-	const uintptr_t SGRF_BUSDMAC_BASE = SGRF_BASE + SGRF_BUSDMAC_OFFSET;
-
-	return SGRF_BUSDMAC_BASE + sizeof(u32) * no;
-}
-
-static void sgrf_init(void)
-{
-	struct rk3368_cru * const cru =
-		(struct rk3368_cru * const)rockchip_get_cru();
-	const u16 SGRF_SOC_CON_SEC = GENMASK(15, 0);
-	const u16 SGRF_BUSDMAC_CON0_SEC = BIT(2);
-	const u16 SGRF_BUSDMAC_CON1_SEC = GENMASK(15, 12);
-
-	/* Set all configurable IP to 'non secure'-mode */
-	rk_setreg(sgrf_soc_con_addr(5), SGRF_SOC_CON_SEC);
-	rk_setreg(sgrf_soc_con_addr(6), SGRF_SOC_CON_SEC);
-	rk_setreg(sgrf_soc_con_addr(7), SGRF_SOC_CON_SEC);
-
-	/*
-	 * From rockchip-uboot/arch/arm/cpu/armv8/rk33xx/cpu.c
-	 * Original comment: "ddr space set no secure mode"
-	 */
-	rk_clrreg(sgrf_soc_con_addr(8), SGRF_SOC_CON_SEC);
-	rk_clrreg(sgrf_soc_con_addr(9), SGRF_SOC_CON_SEC);
-	rk_clrreg(sgrf_soc_con_addr(10), SGRF_SOC_CON_SEC);
-
-	/* Set 'secure dma' to 'non secure'-mode */
-	rk_setreg(sgrf_busdmac_addr(0), SGRF_BUSDMAC_CON0_SEC);
-	rk_setreg(sgrf_busdmac_addr(1), SGRF_BUSDMAC_CON1_SEC);
-
-	dsb();  /* barrier */
-
-	rk_setreg(&cru->softrst_con[1], DMA1_SRST_REQ);
-	rk_setreg(&cru->softrst_con[4], DMA2_SRST_REQ);
-
-	dsb();  /* barrier */
-	udelay(10);
-
-	rk_clrreg(&cru->softrst_con[1], DMA1_SRST_REQ);
-	rk_clrreg(&cru->softrst_con[4], DMA2_SRST_REQ);
-}
-
-void board_debug_uart_init(void)
-{
-	/*
-	 * N.B.: This is called before the device-model has been
-	 *       initialised. For this reason, we can not access
-	 *       the GRF address range using the syscon API.
-	 */
-	struct rk3368_grf * const grf =
-		(struct rk3368_grf * const)0xff770000;
-
-	enum {
-		GPIO2D1_MASK            = GENMASK(3, 2),
-		GPIO2D1_GPIO            = 0,
-		GPIO2D1_UART0_SOUT      = (1 << 2),
-
-		GPIO2D0_MASK            = GENMASK(1, 0),
-		GPIO2D0_GPIO            = 0,
-		GPIO2D0_UART0_SIN       = (1 << 0),
-	};
-
-#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
-	/* Enable early UART0 on the RK3368 */
-	rk_clrsetreg(&grf->gpio2d_iomux,
-		     GPIO2D0_MASK, GPIO2D0_UART0_SIN);
-	rk_clrsetreg(&grf->gpio2d_iomux,
-		     GPIO2D1_MASK, GPIO2D1_UART0_SOUT);
-#endif
-}
-
-void board_init_f(ulong dummy)
-{
-	struct udevice *dev;
-	int ret;
-
-#define EARLY_UART
-#ifdef EARLY_UART
-	/*
-	 * Debug UART can be used from here if required:
-	 *
-	 * debug_uart_init();
-	 * printch('a');
-	 * printhex8(0x1234);
-	 * printascii("string");
-	 */
-	debug_uart_init();
-	printascii("U-Boot TPL board init\n");
-#endif
-
-	ret = spl_early_init();
-	if (ret) {
-		debug("spl_early_init() failed: %d\n", ret);
-		hang();
-	}
-
-	/* Reset security, so we can use DMA in the MMC drivers */
-	sgrf_init();
-
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-	if (ret) {
-		debug("DRAM init failed: %d\n", ret);
-		return;
-	}
-}
-
-void board_return_to_bootrom(void)
-{
-	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
-}
-
-u32 spl_boot_device(void)
-{
-	return BOOT_DEVICE_BOOTROM;
-}
diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c b/arch/arm/mach-rockchip/rk3368/rk3368.c
index f62d91d..8c0b370 100644
--- a/arch/arm/mach-rockchip/rk3368/rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/rk3368.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <asm/armv8/mmu.h>
+#include <asm/arch/bootrom.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/cru_rk3368.h>
@@ -52,16 +53,10 @@ static struct mm_region rk3368_mem_map[] = {
 
 struct mm_region *mem_map = rk3368_mem_map;
 
-int dram_init_banksize(void)
-{
-	size_t max_size = min((unsigned long)gd->ram_size, gd->ram_top);
-
-	/* Reserve 0x200000 for ATF bl31 */
-	gd->bd->bi_dram[0].start = 0x200000;
-	gd->bd->bi_dram[0].size = max_size - gd->bd->bi_dram[0].start;
-
-	return 0;
-}
+const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
+	[BROM_BOOTSOURCE_EMMC] = "/dwmmc@ff0f0000",
+	[BROM_BOOTSOURCE_SD] = "/dwmmc@ff0c0000",
+};
 
 #ifdef CONFIG_ARCH_EARLY_INIT_R
 static int mcu_init(void)
@@ -97,3 +92,104 @@ int arch_early_init_r(void)
 	return mcu_init();
 }
 #endif
+
+#ifdef CONFIG_SPL_BUILD
+/*
+ * The SPL (and also the full U-Boot stage on the RK3368) will run in
+ * secure mode (i.e. EL3) and an ATF will eventually be booted before
+ * starting up the operating system... so we can initialize the SGRF
+ * here and rely on the ATF installing the final (secure) policy
+ * later.
+ */
+static inline uintptr_t sgrf_soc_con_addr(u32 no)
+{
+	const uintptr_t SGRF_BASE =
+		(uintptr_t)syscon_get_first_range(ROCKCHIP_SYSCON_SGRF);
+
+	return SGRF_BASE + sizeof(u32) * no;
+}
+
+static inline uintptr_t sgrf_busdmac_addr(u32 no)
+{
+	const uintptr_t SGRF_BASE =
+		(uintptr_t)syscon_get_first_range(ROCKCHIP_SYSCON_SGRF);
+	const uintptr_t SGRF_BUSDMAC_OFFSET = 0x100;
+	const uintptr_t SGRF_BUSDMAC_BASE = SGRF_BASE + SGRF_BUSDMAC_OFFSET;
+
+	return SGRF_BUSDMAC_BASE + sizeof(u32) * no;
+}
+
+static void sgrf_init(void)
+{
+	struct rk3368_cru * const cru =
+		(struct rk3368_cru * const)rockchip_get_cru();
+	const u16 SGRF_SOC_CON_SEC = GENMASK(15, 0);
+	const u16 SGRF_BUSDMAC_CON0_SEC = BIT(2);
+	const u16 SGRF_BUSDMAC_CON1_SEC = GENMASK(15, 12);
+
+	/* Set all configurable IP to 'non secure'-mode */
+	rk_setreg(sgrf_soc_con_addr(5), SGRF_SOC_CON_SEC);
+	rk_setreg(sgrf_soc_con_addr(6), SGRF_SOC_CON_SEC);
+	rk_setreg(sgrf_soc_con_addr(7), SGRF_SOC_CON_SEC);
+
+	/*
+	 * From rockchip-uboot/arch/arm/cpu/armv8/rk33xx/cpu.c
+	 * Original comment: "ddr space set no secure mode"
+	 */
+	rk_clrreg(sgrf_soc_con_addr(8), SGRF_SOC_CON_SEC);
+	rk_clrreg(sgrf_soc_con_addr(9), SGRF_SOC_CON_SEC);
+	rk_clrreg(sgrf_soc_con_addr(10), SGRF_SOC_CON_SEC);
+
+	/* Set 'secure dma' to 'non secure'-mode */
+	rk_setreg(sgrf_busdmac_addr(0), SGRF_BUSDMAC_CON0_SEC);
+	rk_setreg(sgrf_busdmac_addr(1), SGRF_BUSDMAC_CON1_SEC);
+
+	dsb();  /* barrier */
+
+	rk_setreg(&cru->softrst_con[1], DMA1_SRST_REQ);
+	rk_setreg(&cru->softrst_con[4], DMA2_SRST_REQ);
+
+	dsb();  /* barrier */
+	udelay(10);
+
+	rk_clrreg(&cru->softrst_con[1], DMA1_SRST_REQ);
+	rk_clrreg(&cru->softrst_con[4], DMA2_SRST_REQ);
+}
+
+void board_debug_uart_init(void)
+{
+	/*
+	 * N.B.: This is called before the device-model has been
+	 *       initialised. For this reason, we can not access
+	 *       the GRF address range using the syscon API.
+	 */
+	struct rk3368_grf * const grf =
+		(struct rk3368_grf * const)0xff770000;
+
+	enum {
+		GPIO2D1_MASK            = GENMASK(3, 2),
+		GPIO2D1_GPIO            = 0,
+		GPIO2D1_UART0_SOUT      = (1 << 2),
+
+		GPIO2D0_MASK            = GENMASK(1, 0),
+		GPIO2D0_GPIO            = 0,
+		GPIO2D0_UART0_SIN       = (1 << 0),
+	};
+
+#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0xff180000)
+	/* Enable early UART0 on the RK3368 */
+	rk_clrsetreg(&grf->gpio2d_iomux,
+		     GPIO2D0_MASK, GPIO2D0_UART0_SIN);
+	rk_clrsetreg(&grf->gpio2d_iomux,
+		     GPIO2D1_MASK, GPIO2D1_UART0_SOUT);
+#endif
+}
+
+int arch_cpu_init(void)
+{
+	/* Reset security, so we can use DMA in the MMC drivers */
+	sgrf_init();
+
+	return 0;
+}
+#endif
diff --git a/board/geekbuying/geekbox/geekbox.c b/board/geekbuying/geekbox/geekbox.c
index 88b67f9..d682349 100644
--- a/board/geekbuying/geekbox/geekbox.c
+++ b/board/geekbuying/geekbox/geekbox.c
@@ -7,8 +7,3 @@
 #include <common.h>
 
 DECLARE_GLOBAL_DATA_PTR;
-
-int board_init(void)
-{
-	return 0;
-}
diff --git a/board/rockchip/evb_px5/evb-px5.c b/board/rockchip/evb_px5/evb-px5.c
index 6a47642..ec3d27e 100644
--- a/board/rockchip/evb_px5/evb-px5.c
+++ b/board/rockchip/evb_px5/evb-px5.c
@@ -4,8 +4,3 @@
  * SPDX-License-Identifier:     GPL-2.0+
  */
 #include <common.h>
-
-int board_init(void)
-{
-	return 0;
-}
diff --git a/board/rockchip/sheep_rk3368/sheep_rk3368.c b/board/rockchip/sheep_rk3368/sheep_rk3368.c
index 17adb02..ff2d2d2 100644
--- a/board/rockchip/sheep_rk3368/sheep_rk3368.c
+++ b/board/rockchip/sheep_rk3368/sheep_rk3368.c
@@ -15,8 +15,3 @@ int mach_cpu_init(void)
 {
 	return 0;
 }
-
-int board_init(void)
-{
-	return 0;
-}
diff --git a/board/theobroma-systems/lion_rk3368/lion_rk3368.c b/board/theobroma-systems/lion_rk3368/lion_rk3368.c
index 73b1488..025692b 100644
--- a/board/theobroma-systems/lion_rk3368/lion_rk3368.c
+++ b/board/theobroma-systems/lion_rk3368/lion_rk3368.c
@@ -7,9 +7,6 @@
 #include <dm.h>
 #include <ram.h>
 #include <asm/io.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/grf_rk3368.h>
-#include <asm/arch/timer.h>
 #include <syscon.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -18,8 +15,3 @@ int mach_cpu_init(void)
 {
 	return 0;
 }
-
-int board_init(void)
-{
-	return 0;
-}
