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[U-Boot,v3,3/3] armv8: ls1046ardb: Add RDIMM support

Message ID 1516820670-14505-3-git-send-email-york.sun@nxp.com
State Superseded
Delegated to: York Sun
Headers show
Series [U-Boot,v3,1/3] drivers/ddr/fsl: Fix DDR4 RDIMM support | expand

Commit Message

York Sun Jan. 24, 2018, 7:04 p.m. UTC 
This adds 2Rx8 RDIMM on LS1046ARDB board. Tested with address
parity enabled and disabled with RDIMM MTA18ASF2G72PDZ.

Signed-off-by: York Sun <york.sun@nxp.com>

---

Changes in v3:
Update register control words for different speeds.

Changes in v2:
Update timing table for lower speeds

 board/freescale/ls1046ardb/ddr.c | 27 ++++++++++++++++++++++++---
 board/freescale/ls1046ardb/ddr.h | 16 ++++++++++++++++
 2 files changed, 40 insertions(+), 3 deletions(-)
diff mbox series

Patch

diff --git a/board/freescale/ls1046ardb/ddr.c b/board/freescale/ls1046ardb/ddr.c
index fb4f6ab..ca48f28 100644
--- a/board/freescale/ls1046ardb/ddr.c
+++ b/board/freescale/ls1046ardb/ddr.c
@@ -29,7 +29,10 @@  void fsl_ddr_board_options(memctl_options_t *popts,
 	if (!pdimm->n_ranks)
 		return;
 
-	pbsp = udimms[0];
+	if (popts->registered_dimm_en)
+		pbsp = rdimms[0];
+	else
+		pbsp = udimms[0];
 
 	/* Get clk_adjust, wrlvl_start, wrlvl_ctl, according to the board ddr
 	 * freqency and n_banks specified in board_specific_parameters table.
@@ -66,8 +69,6 @@  found:
 	      pbsp->n_ranks, pbsp->datarate_mhz_high, pbsp->rank_gb);
 
 	popts->data_bus_width = 0;	/* 64-bit data bus */
-	popts->otf_burst_chop_en = 0;
-	popts->burst_length = DDR_BL8;
 	popts->bstopre = 0;		/* enable auto precharge */
 
 	/*
@@ -93,6 +94,26 @@  found:
 	popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) |
 			  DDR_CDR2_VREF_TRAIN_EN | DDR_CDR2_VREF_RANGE_2;
 
+	if (popts->registered_dimm_en) {
+		popts->rcw_1 = 0x000655f0;
+		if (ddr_freq > 3200)
+			popts->rcw_2 = 0xb0700c03;
+		else if (ddr_freq > 2933)
+			popts->rcw_2 = 0xb0600c02;
+		else if (ddr_freq > 2666)
+			popts->rcw_2 = 0xb0500c02;
+		else if (ddr_freq > 2400)
+			popts->rcw_2 = 0xb0400c02;
+		else if (ddr_freq > 2133)
+			popts->rcw_2 = 0xb0300c01;
+		else if (ddr_freq > 1866)
+			popts->rcw_2 = 0xb0100c00;
+		else
+			popts->rcw_2 = 0xb0000c00;
+
+		popts->rcw_3 = ((ddr_freq - 1260 + 19) / 20) << 8;
+	}
+
 	/* optimize cpo for erratum A-009942 */
 	popts->cpo_sample = 0x70;
 }
diff --git a/board/freescale/ls1046ardb/ddr.h b/board/freescale/ls1046ardb/ddr.h
index 9e440f6..ffc2ef9 100644
--- a/board/freescale/ls1046ardb/ddr.h
+++ b/board/freescale/ls1046ardb/ddr.h
@@ -41,4 +41,20 @@  static const struct board_specific_parameters *udimms[] = {
 	udimm0,
 };
 
+static const struct board_specific_parameters rdimm0[] = {
+	/*
+	 * memory controller 0
+	 *   num|  hi| rank|  clk| wrlvl |   wrlvl   |  wrlvl
+	 * ranks| mhz| GB  |adjst| start |   ctl2    |  ctl3
+	 */
+	{2,  1666, 0, 0x8,     0x15, 0x14131110, 0x12131410,},
+	{2,  1900, 0, 0x8,     0x16, 0x15141311, 0x13141511,},
+	{2,  2300, 0, 0xa,     0x1A, 0x18171513, 0x15161814,},
+	{}
+};
+
+static const struct board_specific_parameters *rdimms[] = {
+	rdimm0,
+};
+
 #endif