| Message ID | 1513107663-12616-1-git-send-email-york.sun@nxp.com |
|---|---|
| State | Accepted |
| Commit | 1b7910a37ccc889e1b58a5f6e095a39728564bb8 |
| Delegated to: | York Sun |
| Headers | show |
| Series | [U-Boot] armv8: ls1046aqds: Adjust IFC timing for NOR flash | expand |
On 12/12/2017 11:41 AM, York Sun wrote: > Increase setup, assertion and hold time related to chip-select signal. > Additional delay is needed for the signal to propogate through FPGA. > This adjustment slightly increase the read and write cycle but has no > impact on burst read or write. > > Signed-off-by: York Sun <york.sun@nxp.com> > --- Applied to fsl-qoriq master. York
diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 1713e2c..29dc6d9 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -178,12 +178,13 @@ unsigned long get_board_ddr_clk(void); CSOR_NOR_TRHZ_80) #define CONFIG_SYS_NOR_FTIM0 (FTIM0_NOR_TACSE(0x4) | \ FTIM0_NOR_TEADC(0x5) | \ + FTIM0_NOR_TAVDS(0x6) | \ FTIM0_NOR_TEAHC(0x5)) #define CONFIG_SYS_NOR_FTIM1 (FTIM1_NOR_TACO(0x35) | \ FTIM1_NOR_TRAD_NOR(0x1a) | \ FTIM1_NOR_TSEQRAD_NOR(0x13)) -#define CONFIG_SYS_NOR_FTIM2 (FTIM2_NOR_TCS(0x4) | \ - FTIM2_NOR_TCH(0x4) | \ +#define CONFIG_SYS_NOR_FTIM2 (FTIM2_NOR_TCS(0x8) | \ + FTIM2_NOR_TCH(0x8) | \ FTIM2_NOR_TWPH(0xe) | \ FTIM2_NOR_TWP(0x1c)) #define CONFIG_SYS_NOR_FTIM3 0
Increase setup, assertion and hold time related to chip-select signal. Additional delay is needed for the signal to propogate through FPGA. This adjustment slightly increase the read and write cycle but has no impact on burst read or write. Signed-off-by: York Sun <york.sun@nxp.com> --- This patch supersedes http://patchwork.ozlabs.org/patch/842859/ include/configs/ls1046aqds.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)