From patchwork Sun Oct 1 19:23:19 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 820298 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="KdbR5Phh"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3y4wFZ2x5Gz9t50 for ; Mon, 2 Oct 2017 06:23:46 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 21B7CC21CEC; Sun, 1 Oct 2017 19:23:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 8A39BC21D72; Sun, 1 Oct 2017 19:23:39 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 36284C21D72; Sun, 1 Oct 2017 19:23:38 +0000 (UTC) Received: from mail-qt0-f194.google.com (mail-qt0-f194.google.com [209.85.216.194]) by lists.denx.de (Postfix) with ESMTPS id D532DC21CEC for ; Sun, 1 Oct 2017 19:23:36 +0000 (UTC) Received: by mail-qt0-f194.google.com with SMTP id s18so5065448qta.3 for ; Sun, 01 Oct 2017 12:23:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=3sIuoBnUSdLxDdZDXW4V0+XDMNSCSlOWr6501YmmBZs=; b=KdbR5PhhxtAmUNo971tHh4sYXd+/nyCq35FGL23O1xxdOV/awJHt/zPm9+PZelFpVL S1NfYtZ78J94oZOIjXTV+Jictl3FqifWAAYiSNJDd+hCYCK//KVN9uWDoiUT2lI72+qf NL1T3fZZripyDO0nj9ecJCT5GajGJH6cBsTBuK0mgc1plnw6e4tX0Lj2FA9fPeBQTKe8 nSjc7RB0odDLH2qgDuSdCFVFqZX34RWI4GQDeg5lKcEh14yizW48FL4Y8ZjKV7cYQCZN xDBgmYWaMurEhGs3XYdJ2PD8P8ww/Sjr7dFA0ZtxA33mPnHVj1pL4lVGDoJ4ieXNRCYT ZxnQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=3sIuoBnUSdLxDdZDXW4V0+XDMNSCSlOWr6501YmmBZs=; b=KObOWMY0+Sba2o0WtALlF0MApRbInvfBG4qTIe7c6fBpURFx0dYeOoOacLQlL7dVvg A7HPiY75W5ViyGlRgqeh56Dgvc5oo6WP5Bn+wQgJHduSLYzSTvjjOBAXzvsu3+FPHZ9m KytJ86rBJAl+fYSGr98AqQsjDla5dDWMhaXTsVy4ekQ7W9SAtMtVKfCDJ3PBTJdhJ03g LVuX/GC2JzU5lc5vyXAswHp/a9TqHBW8uAVxsSP+D6hD/E4/shezRdOIZ5RK689Es6j1 2iPjCyyUQjpvv8qKASUriLZFbjRPtCdj33tsAzlf9/NpQ36nq30Q8wHCHfqtV7/maqSP znDw== X-Gm-Message-State: AMCzsaX3OZ8PYdytbW0/e2di6s0Ry1vMl8AZfDN6O0TycZ7DT1GMI72r CsHovbNIpsJ07Y47OSKcZKI= X-Google-Smtp-Source: AOwi7QCG4Om3S7T8t6wLbGAnsE8ttH1ZuSfG+CgRaY2rAQToMzG0RQE2uKn50MIkoA4qn2B0ingnDg== X-Received: by 10.200.41.105 with SMTP id z38mr15640736qtz.106.1506885815523; Sun, 01 Oct 2017 12:23:35 -0700 (PDT) Received: from localhost.localdomain ([187.180.181.115]) by smtp.gmail.com with ESMTPSA id z13sm452819qtb.97.2017.10.01.12.23.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 01 Oct 2017 12:23:34 -0700 (PDT) From: Fabio Estevam To: sbabic@denx.de Date: Sun, 1 Oct 2017 16:23:19 -0300 Message-Id: <1506885799-15587-1-git-send-email-festevam@gmail.com> X-Mailer: git-send-email 2.7.4 Cc: Fabio Estevam , u-boot@lists.denx.de, trini@konsulko.com Subject: [U-Boot] [PATCH] mx6slevk: Fix MMC breakage for the SPL target X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Fabio Estevam Commit 001cdbbb32ef1f6 ("imx: mx6slevk: enable more DM drivers") breaks MMC support in U-Boot proper on the mx6slevk_spl_defconfig target: U-Boot SPL 2017.09-00396-g6ca43a5 (Oct 01 2017 - 16:20:18) Trying to boot from MMC1 U-Boot 2017.09-00396-g6ca43a5 (Oct 01 2017 - 16:20:18 -0300) CPU: Freescale i.MX6SL rev1.0 792 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C) at 33C Reset cause: POR Board: MX6SLEVK I2C: ready DRAM: 1 GiB MMC: FSL_SDHC: 0 MMC Device 1 not found *** Warning - No MMC card found, using default environment Fix this by re-introducing the U-Boot proper mmc init code inside board_mmc_init(). Signed-off-by: Fabio Estevam --- board/freescale/mx6slevk/mx6slevk.c | 81 ++++++++++++++++++++++++++++--------- 1 file changed, 63 insertions(+), 18 deletions(-) diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c index 8afd5da..e9a9bbf 100644 --- a/board/freescale/mx6slevk/mx6slevk.c +++ b/board/freescale/mx6slevk/mx6slevk.c @@ -66,7 +66,6 @@ static iomux_v3_cfg_t const uart1_pads[] = { MX6_PAD_UART1_RXD__UART1_RXD | MUX_PAD_CTRL(UART_PAD_CTRL), }; -#ifdef CONFIG_SPL_BUILD static iomux_v3_cfg_t const usdhc1_pads[] = { /* 8 bit SD */ MX6_PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), @@ -107,7 +106,6 @@ static iomux_v3_cfg_t const usdhc3_pads[] = { /*CD pin*/ MX6_PAD_REF_CLK_32K__GPIO_3_22 | MUX_PAD_CTRL(NO_PAD_CTRL), }; -#endif static iomux_v3_cfg_t const fec_pads[] = { MX6_PAD_FEC_MDC__FEC_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), @@ -157,11 +155,6 @@ static void setup_iomux_fec(void) udelay(15000); } -int board_mmc_get_env_dev(int devno) -{ - return devno; -} - #ifdef CONFIG_DM_PMIC_PFUZE100 int power_init_board(void) { @@ -294,17 +287,6 @@ int board_init(void) return 0; } -int checkboard(void) -{ - puts("Board: MX6SLEVK\n"); - - return 0; -} - -#ifdef CONFIG_SPL_BUILD -#include -#include - #define USDHC1_CD_GPIO IMX_GPIO_NR(4, 7) #define USDHC2_CD_GPIO IMX_GPIO_NR(5, 0) #define USDHC3_CD_GPIO IMX_GPIO_NR(3, 22) @@ -315,6 +297,11 @@ static struct fsl_esdhc_cfg usdhc_cfg[3] = { {USDHC3_BASE_ADDR, 0, 4}, }; +int board_mmc_get_env_dev(int devno) +{ + return devno; +} + int board_mmc_getcd(struct mmc *mmc) { struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; @@ -337,6 +324,52 @@ int board_mmc_getcd(struct mmc *mmc) int board_mmc_init(bd_t *bis) { +#ifndef CONFIG_SPL_BUILD + int i, ret; + + /* + * According to the board_mmc_init() the following map is done: + * (U-Boot device node) (Physical Port) + * mmc0 USDHC1 + * mmc1 USDHC2 + * mmc2 USDHC3 + */ + for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { + switch (i) { + case 0: + imx_iomux_v3_setup_multiple_pads( + usdhc1_pads, ARRAY_SIZE(usdhc1_pads)); + gpio_direction_input(USDHC1_CD_GPIO); + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + break; + case 1: + imx_iomux_v3_setup_multiple_pads( + usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); + gpio_direction_input(USDHC2_CD_GPIO); + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); + break; + case 2: + imx_iomux_v3_setup_multiple_pads( + usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); + gpio_direction_input(USDHC3_CD_GPIO); + usdhc_cfg[2].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + break; + default: + printf("Warning: you configured more USDHC controllers" + "(%d) than supported by the board\n", i + 1); + return -EINVAL; + } + + ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); + if (ret) { + printf("Warning: failed to initialize " + "mmc dev %d\n", i); + return ret; + } + } + + return 0; +#else struct src *src_regs = (struct src *)SRC_BASE_ADDR; u32 val; u32 port; @@ -373,8 +406,20 @@ int board_mmc_init(bd_t *bis) gd->arch.sdhc_clk = usdhc_cfg[0].sdhc_clk; return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); +#endif } +int checkboard(void) +{ + puts("Board: MX6SLEVK\n"); + + return 0; +} + +#ifdef CONFIG_SPL_BUILD +#include +#include + const struct mx6sl_iomux_ddr_regs mx6_ddr_ioregs = { .dram_sdqs0 = 0x00003030, .dram_sdqs1 = 0x00003030,