@@ -40,6 +40,8 @@ CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
# CONFIG_SPL_SIMPLE_BUS is not set
+CONFIG_ADC=y
+CONFIG_SARADC_ROCKCHIP=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
@@ -42,6 +42,8 @@ CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
# CONFIG_SPL_SIMPLE_BUS is not set
+CONFIG_ADC=y
+CONFIG_SARADC_ROCKCHIP=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
@@ -41,6 +41,8 @@ CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
# CONFIG_SPL_SIMPLE_BUS is not set
+CONFIG_ADC=y
+CONFIG_SARADC_ROCKCHIP=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
@@ -13,6 +13,8 @@ CONFIG_CMD_MMC=y
CONFIG_CMD_CACHE=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
+CONFIG_ADC=y
+CONFIG_SARADC_ROCKCHIP=y
CONFIG_CLK=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
@@ -37,6 +37,8 @@ CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
+CONFIG_ADC=y
+CONFIG_SARADC_ROCKCHIP=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
@@ -20,6 +20,8 @@ CONFIG_CMD_TIME=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
+CONFIG_ADC=y
+CONFIG_SARADC_ROCKCHIP=y
CONFIG_CLK=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_MMC_DW=y
@@ -30,6 +30,8 @@ CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
+CONFIG_ADC=y
+CONFIG_SARADC_ROCKCHIP=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
@@ -13,6 +13,8 @@ CONFIG_CMD_TIME=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
+CONFIG_ADC=y
+CONFIG_SARADC_ROCKCHIP=y
CONFIG_CLK=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
@@ -40,6 +40,8 @@ CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
# CONFIG_SPL_SIMPLE_BUS is not set
+CONFIG_ADC=y
+CONFIG_SARADC_ROCKCHIP=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
@@ -40,6 +40,8 @@ CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
# CONFIG_SPL_SIMPLE_BUS is not set
+CONFIG_ADC=y
+CONFIG_SARADC_ROCKCHIP=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
@@ -30,6 +30,8 @@ CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
+CONFIG_ADC=y
+CONFIG_SARADC_ROCKCHIP=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
@@ -9,6 +9,8 @@ CONFIG_DEBUG_UART=y
# CONFIG_CMD_IMLS is not set
CONFIG_REGMAP=y
CONFIG_SYSCON=y
+CONFIG_ADC=y
+CONFIG_SARADC_ROCKCHIP=y
CONFIG_CLK=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_ROCKCHIP_RK3368=y
@@ -52,6 +52,8 @@ CONFIG_TPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
CONFIG_TPL_SYSCON=y
+CONFIG_ADC=y
+CONFIG_SARADC_ROCKCHIP=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_TPL_CLK=y
@@ -40,6 +40,8 @@ CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
# CONFIG_SPL_SIMPLE_BUS is not set
+CONFIG_ADC=y
+CONFIG_SARADC_ROCKCHIP=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
@@ -42,6 +42,8 @@ CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
# CONFIG_SPL_SIMPLE_BUS is not set
+CONFIG_ADC=y
+CONFIG_SARADC_ROCKCHIP=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
@@ -40,6 +40,8 @@ CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
# CONFIG_SPL_SIMPLE_BUS is not set
+CONFIG_ADC=y
+CONFIG_SARADC_ROCKCHIP=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
@@ -41,6 +41,8 @@ CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
+CONFIG_ADC=y
+CONFIG_SARADC_ROCKCHIP=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
@@ -39,6 +39,8 @@ CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
# CONFIG_SPL_SIMPLE_BUS is not set
+CONFIG_ADC=y
+CONFIG_SARADC_ROCKCHIP=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
@@ -29,6 +29,8 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
# CONFIG_SPL_SIMPLE_BUS is not set
+CONFIG_ADC=y
+CONFIG_SARADC_ROCKCHIP=y
CONFIG_CLK=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
@@ -10,6 +10,8 @@ CONFIG_ANDROID_BOOT_IMAGE=y
CONFIG_CMD_MMC=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
+CONFIG_ADC=y
+CONFIG_SARADC_ROCKCHIP=y
CONFIG_CLK=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
@@ -41,6 +41,8 @@ CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
# CONFIG_SPL_SIMPLE_BUS is not set
+CONFIG_ADC=y
+CONFIG_SARADC_ROCKCHIP=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
Except for 3036 and 3228 Socs, which don't support SARADC, enable the ROCKCHIP_SARADC config at the other Socs' defconfig. Signed-off-by: David Wu <david.wu@rock-chips.com> --- Change in v2: - Enable the ROCKCHIP_SARADC at other configs configs/chromebit_mickey_defconfig | 2 ++ configs/chromebook_jerry_defconfig | 2 ++ configs/chromebook_minnie_defconfig | 2 ++ configs/evb-px5_defconfig | 2 ++ configs/evb-rk3288_defconfig | 2 ++ configs/evb-rk3328_defconfig | 2 ++ configs/evb-rk3399_defconfig | 2 ++ configs/evb-rv1108_defconfig | 2 ++ configs/fennec-rk3288_defconfig | 2 ++ configs/firefly-rk3288_defconfig | 2 ++ configs/firefly-rk3399_defconfig | 2 ++ configs/geekbox_defconfig | 2 ++ configs/lion-rk3368_defconfig | 2 ++ configs/miqi-rk3288_defconfig | 2 ++ configs/phycore-rk3288_defconfig | 2 ++ configs/popmetal-rk3288_defconfig | 2 ++ configs/puma-rk3399_defconfig | 2 ++ configs/rock2_defconfig | 2 ++ configs/rock_defconfig | 2 ++ configs/sheep-rk3368_defconfig | 2 ++ configs/tinker-rk3288_defconfig | 2 ++ 21 files changed, 42 insertions(+)