diff mbox

[U-Boot,3/5] configs: socfpga: Add config for RBF loading from FAT fs

Message ID 1501498222-9422-4-git-send-email-tien.fong.chee@intel.com
State Superseded
Delegated to: Marek Vasut
Headers show

Commit Message

Chee, Tien Fong July 31, 2017, 10:50 a.m. UTC
From: Tien Fong Chee <tien.fong.chee@intel.com>

This config enable the mechanism for loading RBF file from FAT fs into
FPGA manager.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
---
 arch/arm/mach-socfpga/Kconfig |    7 +++++++
 1 files changed, 7 insertions(+), 0 deletions(-)

Comments

Marek Vasut July 31, 2017, 10:54 a.m. UTC | #1
On 07/31/2017 12:50 PM, tien.fong.chee@intel.com wrote:
> From: Tien Fong Chee <tien.fong.chee@intel.com>
> 
> This config enable the mechanism for loading RBF file from FAT fs into
> FPGA manager.
> 
> Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
> ---
>  arch/arm/mach-socfpga/Kconfig |    7 +++++++
>  1 files changed, 7 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
> index 45e5379..3fbac20 100644
> --- a/arch/arm/mach-socfpga/Kconfig
> +++ b/arch/arm/mach-socfpga/Kconfig
> @@ -33,6 +33,13 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
>  config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE
>  	default 0xa2
>  
> +config RBF_SDMMC_FAT_SUPPORT

NAK, Xilinx already has some support for loading FPGA from FS, so
improve on that.

> +	bool "Support FPGA program with FAT RBF"
> +	default y if SPL_FAT_SUPPORT
> +	help
> +		Enable support for programming FPGA with RAW binary file
> +		(periph rbf + core rbf) loading from FAT partition.
> +
>  config TARGET_SOCFPGA_ARRIA5
>  	bool
>  	select TARGET_SOCFPGA_GEN5
>
Chee, Tien Fong Aug. 2, 2017, 10:23 a.m. UTC | #2
On Isn, 2017-07-31 at 12:54 +0200, Marek Vasut wrote:
> On 07/31/2017 12:50 PM, tien.fong.chee@intel.com wrote:

> > 

> > From: Tien Fong Chee <tien.fong.chee@intel.com>

> > 

> > This config enable the mechanism for loading RBF file from FAT fs

> > into

> > FPGA manager.

> > 

> > Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>

> > ---

> >  arch/arm/mach-socfpga/Kconfig |    7 +++++++

> >  1 files changed, 7 insertions(+), 0 deletions(-)

> > 

> > diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-

> > socfpga/Kconfig

> > index 45e5379..3fbac20 100644

> > --- a/arch/arm/mach-socfpga/Kconfig

> > +++ b/arch/arm/mach-socfpga/Kconfig

> > @@ -33,6 +33,13 @@ config

> > SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE

> >  config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE

> >  	default 0xa2

> >  

> > +config RBF_SDMMC_FAT_SUPPORT

> NAK, Xilinx already has some support for loading FPGA from FS, so

> improve on that.

> 

thanks for the advice. I will take a look.
> > 

> > +	bool "Support FPGA program with FAT RBF"

> > +	default y if SPL_FAT_SUPPORT

> > +	help

> > +		Enable support for programming FPGA with RAW

> > binary file

> > +		(periph rbf + core rbf) loading from FAT

> > partition.

> > +

> >  config TARGET_SOCFPGA_ARRIA5

> >  	bool

> >  	select TARGET_SOCFPGA_GEN5

> > 

>
Chee, Tien Fong Aug. 7, 2017, 7:18 a.m. UTC | #3
On Isn, 2017-07-31 at 12:54 +0200, Marek Vasut wrote:
> On 07/31/2017 12:50 PM, tien.fong.chee@intel.com wrote:

> > 

> > From: Tien Fong Chee <tien.fong.chee@intel.com>

> > 

> > This config enable the mechanism for loading RBF file from FAT fs

> > into

> > FPGA manager.

> > 

> > Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>

> > ---

> >  arch/arm/mach-socfpga/Kconfig |    7 +++++++

> >  1 files changed, 7 insertions(+), 0 deletions(-)

> > 

> > diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-

> > socfpga/Kconfig

> > index 45e5379..3fbac20 100644

> > --- a/arch/arm/mach-socfpga/Kconfig

> > +++ b/arch/arm/mach-socfpga/Kconfig

> > @@ -33,6 +33,13 @@ config

> > SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE

> >  config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE

> >  	default 0xa2

> >  

> > +config RBF_SDMMC_FAT_SUPPORT

> NAK, Xilinx already has some support for loading FPGA from FS, so

> improve on that.

> 

I can change to CONFIG_CMD_FPGA_LOADFS.
> > 

> > +	bool "Support FPGA program with FAT RBF"

> > +	default y if SPL_FAT_SUPPORT

> > +	help

> > +		Enable support for programming FPGA with RAW

> > binary file

> > +		(periph rbf + core rbf) loading from FAT

> > partition.

> > +

> >  config TARGET_SOCFPGA_ARRIA5

> >  	bool

> >  	select TARGET_SOCFPGA_GEN5

> > 

>
Marek Vasut Aug. 7, 2017, 7:21 a.m. UTC | #4
On 08/07/2017 09:18 AM, Chee, Tien Fong wrote:
> On Isn, 2017-07-31 at 12:54 +0200, Marek Vasut wrote:
>> On 07/31/2017 12:50 PM, tien.fong.chee@intel.com wrote:
>>>
>>> From: Tien Fong Chee <tien.fong.chee@intel.com>
>>>
>>> This config enable the mechanism for loading RBF file from FAT fs
>>> into
>>> FPGA manager.
>>>
>>> Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
>>> ---
>>>  arch/arm/mach-socfpga/Kconfig |    7 +++++++
>>>  1 files changed, 7 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-
>>> socfpga/Kconfig
>>> index 45e5379..3fbac20 100644
>>> --- a/arch/arm/mach-socfpga/Kconfig
>>> +++ b/arch/arm/mach-socfpga/Kconfig
>>> @@ -33,6 +33,13 @@ config
>>> SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
>>>  config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE
>>>  	default 0xa2
>>>  
>>> +config RBF_SDMMC_FAT_SUPPORT
>> NAK, Xilinx already has some support for loading FPGA from FS, so
>> improve on that.
>>
> I can change to CONFIG_CMD_FPGA_LOADFS.

That's what they use iirc.
diff mbox

Patch

diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 45e5379..3fbac20 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -33,6 +33,13 @@  config SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
 config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE
 	default 0xa2
 
+config RBF_SDMMC_FAT_SUPPORT
+	bool "Support FPGA program with FAT RBF"
+	default y if SPL_FAT_SUPPORT
+	help
+		Enable support for programming FPGA with RAW binary file
+		(periph rbf + core rbf) loading from FAT partition.
+
 config TARGET_SOCFPGA_ARRIA5
 	bool
 	select TARGET_SOCFPGA_GEN5