| Message ID | 1501498222-9422-2-git-send-email-tien.fong.chee@intel.com |
|---|---|
| State | Superseded |
| Delegated to: | Marek Vasut |
| Headers | show |
On 07/31/2017 12:50 PM, tien.fong.chee@intel.com wrote: > From: Tien Fong Chee <tien.fong.chee@intel.com> > > Function for checking boot device type, which is required for locating > flash where U-boot image, FPGA design are stored. > > Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> > --- > arch/arm/mach-socfpga/include/mach/misc.h | 19 +++++++++++++++++++ > arch/arm/mach-socfpga/misc_arria10.c | 22 ++++++++++++++++++++++ > 2 files changed, 41 insertions(+), 0 deletions(-) > > diff --git a/arch/arm/mach-socfpga/include/mach/misc.h b/arch/arm/mach-socfpga/include/mach/misc.h > index 0b65783..b219aac 100644 > --- a/arch/arm/mach-socfpga/include/mach/misc.h > +++ b/arch/arm/mach-socfpga/include/mach/misc.h > @@ -14,6 +14,24 @@ struct bsel { > const char *name; > }; > > +enum { > + BOOT_DEVICE_RAM, > + BOOT_DEVICE_MMC1, > + BOOT_DEVICE_MMC2, > + BOOT_DEVICE_MMC2_2, > + BOOT_DEVICE_NAND, > + BOOT_DEVICE_ONENAND, > + BOOT_DEVICE_NOR, > + BOOT_DEVICE_UART, > + BOOT_DEVICE_SPI, > + BOOT_DEVICE_USB, > + BOOT_DEVICE_SATA, > + BOOT_DEVICE_I2C, > + BOOT_DEVICE_BOARD, > + BOOT_DEVICE_DFU, > + BOOT_DEVICE_NONE Why do you have so many bootdevices here if half of them aren't supported/used ? > +}; > + > extern struct bsel bsel_str[]; > > #ifdef CONFIG_FPGA > @@ -26,6 +44,7 @@ static inline void socfpga_fpga_add(void) {} > unsigned int dedicated_uart_com_port(const void *blob); > unsigned int shared_uart_com_port(const void *blob); > unsigned int uart_com_port(const void *blob); > +u32 boot_device(void); > #endif > > #endif /* _MISC_H_ */ > diff --git a/arch/arm/mach-socfpga/misc_arria10.c b/arch/arm/mach-socfpga/misc_arria10.c > index 9d751f6..069a0a6 100644 > --- a/arch/arm/mach-socfpga/misc_arria10.c > +++ b/arch/arm/mach-socfpga/misc_arria10.c > @@ -235,6 +235,28 @@ unsigned int uart_com_port(const void *blob) > return shared_uart_com_port(blob); > } > > +u32 boot_device(void) > +{ > + const u32 bsel = readl(&sysmgr_regs->bootinfo); > + > + switch (SYSMGR_GET_BOOTINFO_BSEL(bsel)) { This looks very similar to what is on Gen5 ? > + case 0x1: /* FPGA (HPS2FPGA Bridge) */ > + return BOOT_DEVICE_RAM; > + case 0x2: /* NAND Flash (1.8V) */ > + case 0x3: /* NAND Flash (3.0V) */ > + return BOOT_DEVICE_NAND; > + case 0x4: /* SD/MMC External Transceiver (1.8V) */ > + case 0x5: /* SD/MMC Internal Transceiver (3.0V) */ > + return BOOT_DEVICE_MMC1; > + case 0x6: /* QSPI Flash (1.8V) */ > + case 0x7: /* QSPI Flash (3.0V) */ > + return BOOT_DEVICE_SPI; > + default: > + printf("Invalid boot device (bsel=%08x)!\n", bsel); > + hang(); > + } > +} > + > /* > * Print CPU information > */ >
On Isn, 2017-07-31 at 12:53 +0200, Marek Vasut wrote: > On 07/31/2017 12:50 PM, tien.fong.chee@intel.com wrote: > > > > From: Tien Fong Chee <tien.fong.chee@intel.com> > > > > Function for checking boot device type, which is required for > > locating > > flash where U-boot image, FPGA design are stored. > > > > Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> > > --- > > arch/arm/mach-socfpga/include/mach/misc.h | 19 > > +++++++++++++++++++ > > arch/arm/mach-socfpga/misc_arria10.c | 22 > > ++++++++++++++++++++++ > > 2 files changed, 41 insertions(+), 0 deletions(-) > > > > diff --git a/arch/arm/mach-socfpga/include/mach/misc.h > > b/arch/arm/mach-socfpga/include/mach/misc.h > > index 0b65783..b219aac 100644 > > --- a/arch/arm/mach-socfpga/include/mach/misc.h > > +++ b/arch/arm/mach-socfpga/include/mach/misc.h > > @@ -14,6 +14,24 @@ struct bsel { > > const char *name; > > }; > > > > +enum { > > + BOOT_DEVICE_RAM, > > + BOOT_DEVICE_MMC1, > > + BOOT_DEVICE_MMC2, > > + BOOT_DEVICE_MMC2_2, > > + BOOT_DEVICE_NAND, > > + BOOT_DEVICE_ONENAND, > > + BOOT_DEVICE_NOR, > > + BOOT_DEVICE_UART, > > + BOOT_DEVICE_SPI, > > + BOOT_DEVICE_USB, > > + BOOT_DEVICE_SATA, > > + BOOT_DEVICE_I2C, > > + BOOT_DEVICE_BOARD, > > + BOOT_DEVICE_DFU, > > + BOOT_DEVICE_NONE > Why do you have so many bootdevices here if half of them aren't > supported/used ? > Okay, i will reduce it, i refered this from spl.h > > > > +}; > > + > > extern struct bsel bsel_str[]; > > > > #ifdef CONFIG_FPGA > > @@ -26,6 +44,7 @@ static inline void socfpga_fpga_add(void) {} > > unsigned int dedicated_uart_com_port(const void *blob); > > unsigned int shared_uart_com_port(const void *blob); > > unsigned int uart_com_port(const void *blob); > > +u32 boot_device(void); > > #endif > > > > #endif /* _MISC_H_ */ > > diff --git a/arch/arm/mach-socfpga/misc_arria10.c b/arch/arm/mach- > > socfpga/misc_arria10.c > > index 9d751f6..069a0a6 100644 > > --- a/arch/arm/mach-socfpga/misc_arria10.c > > +++ b/arch/arm/mach-socfpga/misc_arria10.c > > @@ -235,6 +235,28 @@ unsigned int uart_com_port(const void *blob) > > return shared_uart_com_port(blob); > > } > > > > +u32 boot_device(void) > > +{ > > + const u32 bsel = readl(&sysmgr_regs->bootinfo); > > + > > + switch (SYSMGR_GET_BOOTINFO_BSEL(bsel)) { > This looks very similar to what is on Gen5 ? > I refered from function spl_boot_device in spl.c . I copied the function here, because U-boot also need it. > > > > + case 0x1: /* FPGA (HPS2FPGA Bridge) */ > > + return BOOT_DEVICE_RAM; > > + case 0x2: /* NAND Flash (1.8V) */ > > + case 0x3: /* NAND Flash (3.0V) */ > > + return BOOT_DEVICE_NAND; > > + case 0x4: /* SD/MMC External Transceiver (1.8V) */ > > + case 0x5: /* SD/MMC Internal Transceiver (3.0V) */ > > + return BOOT_DEVICE_MMC1; > > + case 0x6: /* QSPI Flash (1.8V) */ > > + case 0x7: /* QSPI Flash (3.0V) */ > > + return BOOT_DEVICE_SPI; > > + default: > > + printf("Invalid boot device (bsel=%08x)!\n", > > bsel); > > + hang(); > > + } > > +} > > + > > /* > > * Print CPU information > > */ > > >
On 08/02/2017 12:21 PM, Chee, Tien Fong wrote: > On Isn, 2017-07-31 at 12:53 +0200, Marek Vasut wrote: >> On 07/31/2017 12:50 PM, tien.fong.chee@intel.com wrote: >>> >>> From: Tien Fong Chee <tien.fong.chee@intel.com> >>> >>> Function for checking boot device type, which is required for >>> locating >>> flash where U-boot image, FPGA design are stored. >>> >>> Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> >>> --- >>> arch/arm/mach-socfpga/include/mach/misc.h | 19 >>> +++++++++++++++++++ >>> arch/arm/mach-socfpga/misc_arria10.c | 22 >>> ++++++++++++++++++++++ >>> 2 files changed, 41 insertions(+), 0 deletions(-) >>> >>> diff --git a/arch/arm/mach-socfpga/include/mach/misc.h >>> b/arch/arm/mach-socfpga/include/mach/misc.h >>> index 0b65783..b219aac 100644 >>> --- a/arch/arm/mach-socfpga/include/mach/misc.h >>> +++ b/arch/arm/mach-socfpga/include/mach/misc.h >>> @@ -14,6 +14,24 @@ struct bsel { >>> const char *name; >>> }; >>> >>> +enum { >>> + BOOT_DEVICE_RAM, >>> + BOOT_DEVICE_MMC1, >>> + BOOT_DEVICE_MMC2, >>> + BOOT_DEVICE_MMC2_2, >>> + BOOT_DEVICE_NAND, >>> + BOOT_DEVICE_ONENAND, >>> + BOOT_DEVICE_NOR, >>> + BOOT_DEVICE_UART, >>> + BOOT_DEVICE_SPI, >>> + BOOT_DEVICE_USB, >>> + BOOT_DEVICE_SATA, >>> + BOOT_DEVICE_I2C, >>> + BOOT_DEVICE_BOARD, >>> + BOOT_DEVICE_DFU, >>> + BOOT_DEVICE_NONE >> Why do you have so many bootdevices here if half of them aren't >> supported/used ? >> > Okay, i will reduce it, i refered this from spl.h >>> >>> +}; >>> + >>> extern struct bsel bsel_str[]; >>> >>> #ifdef CONFIG_FPGA >>> @@ -26,6 +44,7 @@ static inline void socfpga_fpga_add(void) {} >>> unsigned int dedicated_uart_com_port(const void *blob); >>> unsigned int shared_uart_com_port(const void *blob); >>> unsigned int uart_com_port(const void *blob); >>> +u32 boot_device(void); >>> #endif >>> >>> #endif /* _MISC_H_ */ >>> diff --git a/arch/arm/mach-socfpga/misc_arria10.c b/arch/arm/mach- >>> socfpga/misc_arria10.c >>> index 9d751f6..069a0a6 100644 >>> --- a/arch/arm/mach-socfpga/misc_arria10.c >>> +++ b/arch/arm/mach-socfpga/misc_arria10.c >>> @@ -235,6 +235,28 @@ unsigned int uart_com_port(const void *blob) >>> return shared_uart_com_port(blob); >>> } >>> >>> +u32 boot_device(void) >>> +{ >>> + const u32 bsel = readl(&sysmgr_regs->bootinfo); >>> + >>> + switch (SYSMGR_GET_BOOTINFO_BSEL(bsel)) { >> This looks very similar to what is on Gen5 ? >> > I refered from function spl_boot_device in spl.c . I copied the > function here, because U-boot also need it. So can the same code used for gen5 be recycled on gen10 ? >>> >>> + case 0x1: /* FPGA (HPS2FPGA Bridge) */ >>> + return BOOT_DEVICE_RAM; >>> + case 0x2: /* NAND Flash (1.8V) */ >>> + case 0x3: /* NAND Flash (3.0V) */ >>> + return BOOT_DEVICE_NAND; >>> + case 0x4: /* SD/MMC External Transceiver (1.8V) */ >>> + case 0x5: /* SD/MMC Internal Transceiver (3.0V) */ >>> + return BOOT_DEVICE_MMC1; >>> + case 0x6: /* QSPI Flash (1.8V) */ >>> + case 0x7: /* QSPI Flash (3.0V) */ >>> + return BOOT_DEVICE_SPI; >>> + default: >>> + printf("Invalid boot device (bsel=%08x)!\n", >>> bsel); >>> + hang(); >>> + } >>> +} >>> + >>> /* >>> * Print CPU information >>> */ >>>
On Rab, 2017-08-02 at 23:32 +0200, Marek Vasut wrote: > On 08/02/2017 12:21 PM, Chee, Tien Fong wrote: > > > > On Isn, 2017-07-31 at 12:53 +0200, Marek Vasut wrote: > > > > > > On 07/31/2017 12:50 PM, tien.fong.chee@intel.com wrote: > > > > > > > > > > > > From: Tien Fong Chee <tien.fong.chee@intel.com> > > > > > > > > Function for checking boot device type, which is required for > > > > locating > > > > flash where U-boot image, FPGA design are stored. > > > > > > > > Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> > > > > --- > > > > arch/arm/mach-socfpga/include/mach/misc.h | 19 > > > > +++++++++++++++++++ > > > > arch/arm/mach-socfpga/misc_arria10.c | 22 > > > > ++++++++++++++++++++++ > > > > 2 files changed, 41 insertions(+), 0 deletions(-) > > > > > > > > diff --git a/arch/arm/mach-socfpga/include/mach/misc.h > > > > b/arch/arm/mach-socfpga/include/mach/misc.h > > > > index 0b65783..b219aac 100644 > > > > --- a/arch/arm/mach-socfpga/include/mach/misc.h > > > > +++ b/arch/arm/mach-socfpga/include/mach/misc.h > > > > @@ -14,6 +14,24 @@ struct bsel { > > > > const char *name; > > > > }; > > > > > > > > +enum { > > > > + BOOT_DEVICE_RAM, > > > > + BOOT_DEVICE_MMC1, > > > > + BOOT_DEVICE_MMC2, > > > > + BOOT_DEVICE_MMC2_2, > > > > + BOOT_DEVICE_NAND, > > > > + BOOT_DEVICE_ONENAND, > > > > + BOOT_DEVICE_NOR, > > > > + BOOT_DEVICE_UART, > > > > + BOOT_DEVICE_SPI, > > > > + BOOT_DEVICE_USB, > > > > + BOOT_DEVICE_SATA, > > > > + BOOT_DEVICE_I2C, > > > > + BOOT_DEVICE_BOARD, > > > > + BOOT_DEVICE_DFU, > > > > + BOOT_DEVICE_NONE > > > Why do you have so many bootdevices here if half of them aren't > > > supported/used ? > > > > > Okay, i will reduce it, i refered this from spl.h > > > > > > > > > > > > > > > +}; > > > > + > > > > extern struct bsel bsel_str[]; > > > > > > > > #ifdef CONFIG_FPGA > > > > @@ -26,6 +44,7 @@ static inline void socfpga_fpga_add(void) {} > > > > unsigned int dedicated_uart_com_port(const void *blob); > > > > unsigned int shared_uart_com_port(const void *blob); > > > > unsigned int uart_com_port(const void *blob); > > > > +u32 boot_device(void); > > > > #endif > > > > > > > > #endif /* _MISC_H_ */ > > > > diff --git a/arch/arm/mach-socfpga/misc_arria10.c > > > > b/arch/arm/mach- > > > > socfpga/misc_arria10.c > > > > index 9d751f6..069a0a6 100644 > > > > --- a/arch/arm/mach-socfpga/misc_arria10.c > > > > +++ b/arch/arm/mach-socfpga/misc_arria10.c > > > > @@ -235,6 +235,28 @@ unsigned int uart_com_port(const void > > > > *blob) > > > > return shared_uart_com_port(blob); > > > > } > > > > > > > > +u32 boot_device(void) > > > > +{ > > > > + const u32 bsel = readl(&sysmgr_regs->bootinfo); > > > > + > > > > + switch (SYSMGR_GET_BOOTINFO_BSEL(bsel)) { > > > This looks very similar to what is on Gen5 ? > > > > > I refered from function spl_boot_device in spl.c . I copied the > > function here, because U-boot also need it. > So can the same code used for gen5 be recycled on gen10 ? > Are you means SYSMGR_GET_BOOTINFO_BSEL? This is common #define shared between gen5 and gen10. If you means boot_device function, then gen5 doesn't has this function. Please correct me if i misunderstand your question. > > > > > > > > > > > > > > > > > + case 0x1: /* FPGA (HPS2FPGA Bridge) */ > > > > + return BOOT_DEVICE_RAM; > > > > + case 0x2: /* NAND Flash (1.8V) */ > > > > + case 0x3: /* NAND Flash (3.0V) */ > > > > + return BOOT_DEVICE_NAND; > > > > + case 0x4: /* SD/MMC External Transceiver (1.8V) > > > > */ > > > > + case 0x5: /* SD/MMC Internal Transceiver (3.0V) > > > > */ > > > > + return BOOT_DEVICE_MMC1; > > > > + case 0x6: /* QSPI Flash (1.8V) */ > > > > + case 0x7: /* QSPI Flash (3.0V) */ > > > > + return BOOT_DEVICE_SPI; > > > > + default: > > > > + printf("Invalid boot device (bsel=%08x)!\n", > > > > bsel); > > > > + hang(); > > > > + } > > > > +} > > > > + > > > > /* > > > > * Print CPU information > > > > */ > > > > >
On 08/04/2017 07:37 AM, Chee, Tien Fong wrote: > On Rab, 2017-08-02 at 23:32 +0200, Marek Vasut wrote: >> On 08/02/2017 12:21 PM, Chee, Tien Fong wrote: >>> >>> On Isn, 2017-07-31 at 12:53 +0200, Marek Vasut wrote: >>>> >>>> On 07/31/2017 12:50 PM, tien.fong.chee@intel.com wrote: >>>>> >>>>> >>>>> From: Tien Fong Chee <tien.fong.chee@intel.com> >>>>> >>>>> Function for checking boot device type, which is required for >>>>> locating >>>>> flash where U-boot image, FPGA design are stored. >>>>> >>>>> Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> >>>>> --- >>>>> arch/arm/mach-socfpga/include/mach/misc.h | 19 >>>>> +++++++++++++++++++ >>>>> arch/arm/mach-socfpga/misc_arria10.c | 22 >>>>> ++++++++++++++++++++++ >>>>> 2 files changed, 41 insertions(+), 0 deletions(-) >>>>> >>>>> diff --git a/arch/arm/mach-socfpga/include/mach/misc.h >>>>> b/arch/arm/mach-socfpga/include/mach/misc.h >>>>> index 0b65783..b219aac 100644 >>>>> --- a/arch/arm/mach-socfpga/include/mach/misc.h >>>>> +++ b/arch/arm/mach-socfpga/include/mach/misc.h >>>>> @@ -14,6 +14,24 @@ struct bsel { >>>>> const char *name; >>>>> }; >>>>> >>>>> +enum { >>>>> + BOOT_DEVICE_RAM, >>>>> + BOOT_DEVICE_MMC1, >>>>> + BOOT_DEVICE_MMC2, >>>>> + BOOT_DEVICE_MMC2_2, >>>>> + BOOT_DEVICE_NAND, >>>>> + BOOT_DEVICE_ONENAND, >>>>> + BOOT_DEVICE_NOR, >>>>> + BOOT_DEVICE_UART, >>>>> + BOOT_DEVICE_SPI, >>>>> + BOOT_DEVICE_USB, >>>>> + BOOT_DEVICE_SATA, >>>>> + BOOT_DEVICE_I2C, >>>>> + BOOT_DEVICE_BOARD, >>>>> + BOOT_DEVICE_DFU, >>>>> + BOOT_DEVICE_NONE >>>> Why do you have so many bootdevices here if half of them aren't >>>> supported/used ? >>>> >>> Okay, i will reduce it, i refered this from spl.h >>>> >>>>> >>>>> >>>>> +}; >>>>> + >>>>> extern struct bsel bsel_str[]; >>>>> >>>>> #ifdef CONFIG_FPGA >>>>> @@ -26,6 +44,7 @@ static inline void socfpga_fpga_add(void) {} >>>>> unsigned int dedicated_uart_com_port(const void *blob); >>>>> unsigned int shared_uart_com_port(const void *blob); >>>>> unsigned int uart_com_port(const void *blob); >>>>> +u32 boot_device(void); >>>>> #endif >>>>> >>>>> #endif /* _MISC_H_ */ >>>>> diff --git a/arch/arm/mach-socfpga/misc_arria10.c >>>>> b/arch/arm/mach- >>>>> socfpga/misc_arria10.c >>>>> index 9d751f6..069a0a6 100644 >>>>> --- a/arch/arm/mach-socfpga/misc_arria10.c >>>>> +++ b/arch/arm/mach-socfpga/misc_arria10.c >>>>> @@ -235,6 +235,28 @@ unsigned int uart_com_port(const void >>>>> *blob) >>>>> return shared_uart_com_port(blob); >>>>> } >>>>> >>>>> +u32 boot_device(void) >>>>> +{ >>>>> + const u32 bsel = readl(&sysmgr_regs->bootinfo); >>>>> + >>>>> + switch (SYSMGR_GET_BOOTINFO_BSEL(bsel)) { >>>> This looks very similar to what is on Gen5 ? >>>> >>> I refered from function spl_boot_device in spl.c . I copied the >>> function here, because U-boot also need it. >> So can the same code used for gen5 be recycled on gen10 ? >> > Are you means SYSMGR_GET_BOOTINFO_BSEL? This is common #define shared > between gen5 and gen10. > If you means boot_device function, then gen5 doesn't has this function. > Please correct me if i misunderstand your question. Did you try for example git grep BOOT_DEVICE arch/arm/mach-socfpga ? It should point you to spl_boot_device in spl.c
On Jum, 2017-08-04 at 15:10 +0200, Marek Vasut wrote: > On 08/04/2017 07:37 AM, Chee, Tien Fong wrote: > > > > On Rab, 2017-08-02 at 23:32 +0200, Marek Vasut wrote: > > > > > > On 08/02/2017 12:21 PM, Chee, Tien Fong wrote: > > > > > > > > > > > > On Isn, 2017-07-31 at 12:53 +0200, Marek Vasut wrote: > > > > > > > > > > > > > > > On 07/31/2017 12:50 PM, tien.fong.chee@intel.com wrote: > > > > > > > > > > > > > > > > > > > > > > > > From: Tien Fong Chee <tien.fong.chee@intel.com> > > > > > > > > > > > > Function for checking boot device type, which is required > > > > > > for > > > > > > locating > > > > > > flash where U-boot image, FPGA design are stored. > > > > > > > > > > > > Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> > > > > > > --- > > > > > > arch/arm/mach-socfpga/include/mach/misc.h | 19 > > > > > > +++++++++++++++++++ > > > > > > arch/arm/mach-socfpga/misc_arria10.c | 22 > > > > > > ++++++++++++++++++++++ > > > > > > 2 files changed, 41 insertions(+), 0 deletions(-) > > > > > > > > > > > > diff --git a/arch/arm/mach-socfpga/include/mach/misc.h > > > > > > b/arch/arm/mach-socfpga/include/mach/misc.h > > > > > > index 0b65783..b219aac 100644 > > > > > > --- a/arch/arm/mach-socfpga/include/mach/misc.h > > > > > > +++ b/arch/arm/mach-socfpga/include/mach/misc.h > > > > > > @@ -14,6 +14,24 @@ struct bsel { > > > > > > const char *name; > > > > > > }; > > > > > > > > > > > > +enum { > > > > > > + BOOT_DEVICE_RAM, > > > > > > + BOOT_DEVICE_MMC1, > > > > > > + BOOT_DEVICE_MMC2, > > > > > > + BOOT_DEVICE_MMC2_2, > > > > > > + BOOT_DEVICE_NAND, > > > > > > + BOOT_DEVICE_ONENAND, > > > > > > + BOOT_DEVICE_NOR, > > > > > > + BOOT_DEVICE_UART, > > > > > > + BOOT_DEVICE_SPI, > > > > > > + BOOT_DEVICE_USB, > > > > > > + BOOT_DEVICE_SATA, > > > > > > + BOOT_DEVICE_I2C, > > > > > > + BOOT_DEVICE_BOARD, > > > > > > + BOOT_DEVICE_DFU, > > > > > > + BOOT_DEVICE_NONE > > > > > Why do you have so many bootdevices here if half of them > > > > > aren't > > > > > supported/used ? > > > > > > > > > Okay, i will reduce it, i refered this from spl.h > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > +}; > > > > > > + > > > > > > extern struct bsel bsel_str[]; > > > > > > > > > > > > #ifdef CONFIG_FPGA > > > > > > @@ -26,6 +44,7 @@ static inline void socfpga_fpga_add(void) > > > > > > {} > > > > > > unsigned int dedicated_uart_com_port(const void *blob); > > > > > > unsigned int shared_uart_com_port(const void *blob); > > > > > > unsigned int uart_com_port(const void *blob); > > > > > > +u32 boot_device(void); > > > > > > #endif > > > > > > > > > > > > #endif /* _MISC_H_ */ > > > > > > diff --git a/arch/arm/mach-socfpga/misc_arria10.c > > > > > > b/arch/arm/mach- > > > > > > socfpga/misc_arria10.c > > > > > > index 9d751f6..069a0a6 100644 > > > > > > --- a/arch/arm/mach-socfpga/misc_arria10.c > > > > > > +++ b/arch/arm/mach-socfpga/misc_arria10.c > > > > > > @@ -235,6 +235,28 @@ unsigned int uart_com_port(const void > > > > > > *blob) > > > > > > return shared_uart_com_port(blob); > > > > > > } > > > > > > > > > > > > +u32 boot_device(void) > > > > > > +{ > > > > > > + const u32 bsel = readl(&sysmgr_regs->bootinfo); > > > > > > + > > > > > > + switch (SYSMGR_GET_BOOTINFO_BSEL(bsel)) { > > > > > This looks very similar to what is on Gen5 ? > > > > > > > > > I refered from function spl_boot_device in spl.c . I copied > > > > the > > > > function here, because U-boot also need it. > > > So can the same code used for gen5 be recycled on gen10 ? > > > > > Are you means SYSMGR_GET_BOOTINFO_BSEL? This is common #define > > shared > > between gen5 and gen10. > > If you means boot_device function, then gen5 doesn't has this > > function. > > Please correct me if i misunderstand your question. > Did you try for example git grep BOOT_DEVICE arch/arm/mach-socfpga ? > It should point you to spl_boot_device in spl.c > Okay, i know what's you trying to say. I can change this function as common code for both SPL and U-boot. Thanks.
diff --git a/arch/arm/mach-socfpga/include/mach/misc.h b/arch/arm/mach-socfpga/include/mach/misc.h index 0b65783..b219aac 100644 --- a/arch/arm/mach-socfpga/include/mach/misc.h +++ b/arch/arm/mach-socfpga/include/mach/misc.h @@ -14,6 +14,24 @@ struct bsel { const char *name; }; +enum { + BOOT_DEVICE_RAM, + BOOT_DEVICE_MMC1, + BOOT_DEVICE_MMC2, + BOOT_DEVICE_MMC2_2, + BOOT_DEVICE_NAND, + BOOT_DEVICE_ONENAND, + BOOT_DEVICE_NOR, + BOOT_DEVICE_UART, + BOOT_DEVICE_SPI, + BOOT_DEVICE_USB, + BOOT_DEVICE_SATA, + BOOT_DEVICE_I2C, + BOOT_DEVICE_BOARD, + BOOT_DEVICE_DFU, + BOOT_DEVICE_NONE +}; + extern struct bsel bsel_str[]; #ifdef CONFIG_FPGA @@ -26,6 +44,7 @@ static inline void socfpga_fpga_add(void) {} unsigned int dedicated_uart_com_port(const void *blob); unsigned int shared_uart_com_port(const void *blob); unsigned int uart_com_port(const void *blob); +u32 boot_device(void); #endif #endif /* _MISC_H_ */ diff --git a/arch/arm/mach-socfpga/misc_arria10.c b/arch/arm/mach-socfpga/misc_arria10.c index 9d751f6..069a0a6 100644 --- a/arch/arm/mach-socfpga/misc_arria10.c +++ b/arch/arm/mach-socfpga/misc_arria10.c @@ -235,6 +235,28 @@ unsigned int uart_com_port(const void *blob) return shared_uart_com_port(blob); } +u32 boot_device(void) +{ + const u32 bsel = readl(&sysmgr_regs->bootinfo); + + switch (SYSMGR_GET_BOOTINFO_BSEL(bsel)) { + case 0x1: /* FPGA (HPS2FPGA Bridge) */ + return BOOT_DEVICE_RAM; + case 0x2: /* NAND Flash (1.8V) */ + case 0x3: /* NAND Flash (3.0V) */ + return BOOT_DEVICE_NAND; + case 0x4: /* SD/MMC External Transceiver (1.8V) */ + case 0x5: /* SD/MMC Internal Transceiver (3.0V) */ + return BOOT_DEVICE_MMC1; + case 0x6: /* QSPI Flash (1.8V) */ + case 0x7: /* QSPI Flash (3.0V) */ + return BOOT_DEVICE_SPI; + default: + printf("Invalid boot device (bsel=%08x)!\n", bsel); + hang(); + } +} + /* * Print CPU information */