From patchwork Wed Jun 21 08:31:35 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: stefanc@malvell.com X-Patchwork-Id: 778813 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3wt3cp0291z9ryv for ; Wed, 21 Jun 2017 22:17:29 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id BFCADC21C73; Wed, 21 Jun 2017 12:15:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.7 required=5.0 tests=RCVD_IN_DNSWL_LOW autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 22A5AC21CCD; Wed, 21 Jun 2017 12:12:12 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id F1A3AC21C6F; Wed, 21 Jun 2017 08:35:35 +0000 (UTC) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by lists.denx.de (Postfix) with ESMTPS id 91E88C21CA3 for ; Wed, 21 Jun 2017 08:35:34 +0000 (UTC) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id v5L8UP8w017563; Wed, 21 Jun 2017 01:35:31 -0700 Received: from sc-exch02.marvell.com ([199.233.58.182]) by mx0a-0016f401.pphosted.com with ESMTP id 2b6cq7pwb5-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 21 Jun 2017 01:35:31 -0700 Received: from IL-EXCH03.marvell.com (10.5.102.220) by SC-EXCH02.marvell.com (10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Wed, 21 Jun 2017 01:35:30 -0700 Received: from SC-EXCH02.marvell.com (10.93.176.82) by IL-EXCH03.marvell.com (10.5.102.220) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Wed, 21 Jun 2017 11:35:27 +0300 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH02.marvell.com (10.93.176.82) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Wed, 21 Jun 2017 01:35:27 -0700 Received: from stefanc.pt.marvell.com (unknown [10.5.24.120]) by maili.marvell.com (Postfix) with ESMTP id 809D13F703F; Wed, 21 Jun 2017 01:35:25 -0700 (PDT) From: To: Date: Wed, 21 Jun 2017 11:31:35 +0300 Message-ID: <1498033898-15650-8-git-send-email-stefanc@malvell.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1498033898-15650-1-git-send-email-stefanc@malvell.com> References: <1498033898-15650-1-git-send-email-stefanc@malvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-06-21_01:, , signatures=0 X-Proofpoint-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=15 phishscore=0 bulkscore=0 spamscore=0 clxscore=1034 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1703280000 definitions=main-1706210143 X-Mailman-Approved-At: Wed, 21 Jun 2017 12:12:02 +0000 Cc: stefanc@malvell.com, joe.hershberger@ni.com, sr@denx.de, igall@marvell.com Subject: [U-Boot] [PATCH 07/10] net: mvpp2x: Remove IRQ configuration from u-boot X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Stefan Chulski Remove IRQ configuration from u-boot PP driver. U-BOOT don't use interupts and coniguration of IRQ in u-boot caused crushes in Linux interupt shared mode. Also interput cause is redundant in RX routine since single RXQ used. Change-Id: Ie7dda9bc57accb24c2e58c63de31f359711e71e5 Signed-off-by: Stefan Chulski Reviewed-on: http://vgitil04.il.marvell.com:8080/39966 Tested-by: iSoC Platform CI Reviewed-by: Nadav Haklai Reviewed-on: http://vgitil04.il.marvell.com:8080/39952 Reviewed-by: Igal Liberman Acked-by: Joe Hershberger --- drivers/net/mvpp2.c | 46 +--------------------------------------------- 1 file changed, 1 insertion(+), 45 deletions(-) diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c index e74421f..2cdf934 100644 --- a/drivers/net/mvpp2.c +++ b/drivers/net/mvpp2.c @@ -4689,20 +4689,6 @@ static int mvpp2_port_init(struct udevice *dev, struct mvpp2_port *port) port->rxqs[queue] = rxq; } - /* Configure Rx queue group interrupt for this port */ - if (priv->hw_version == MVPP21) { - mvpp2_write(priv, MVPP21_ISR_RXQ_GROUP_REG(port->id), - CONFIG_MV_ETH_RXQ); - } else { - u32 val; - - val = (port->id << MVPP22_ISR_RXQ_GROUP_INDEX_GROUP_OFFSET); - mvpp2_write(priv, MVPP22_ISR_RXQ_GROUP_INDEX_REG, val); - - val = (CONFIG_MV_ETH_RXQ << - MVPP22_ISR_RXQ_SUB_GROUP_SIZE_OFFSET); - mvpp2_write(priv, MVPP22_ISR_RXQ_SUB_GROUP_CONFIG_REG, val); - } /* Create Rx descriptor rings */ for (queue = 0; queue < rxq_number; queue++) { @@ -5065,25 +5051,6 @@ static int mvpp2_init(struct udevice *dev, struct mvpp2 *priv) if (priv->hw_version == MVPP22) mvpp2_tx_fifo_init(priv); - /* Reset Rx queue group interrupt configuration */ - for (i = 0; i < MVPP2_MAX_PORTS; i++) { - if (priv->hw_version == MVPP21) { - mvpp2_write(priv, MVPP21_ISR_RXQ_GROUP_REG(i), - CONFIG_MV_ETH_RXQ); - continue; - } else { - u32 val; - - val = (i << MVPP22_ISR_RXQ_GROUP_INDEX_GROUP_OFFSET); - mvpp2_write(priv, MVPP22_ISR_RXQ_GROUP_INDEX_REG, val); - - val = (CONFIG_MV_ETH_RXQ << - MVPP22_ISR_RXQ_SUB_GROUP_SIZE_OFFSET); - mvpp2_write(priv, - MVPP22_ISR_RXQ_SUB_GROUP_CONFIG_REG, val); - } - } - if (priv->hw_version == MVPP21) writel(MVPP2_EXT_GLOBAL_CTRL_DEFAULT, priv->lms_base + MVPP2_MNG_EXTENDED_GLOBAL_CTRL_REG); @@ -5229,21 +5196,10 @@ static int mvpp2_recv(struct udevice *dev, int flags, uchar **packetp) int pool, rx_bytes, err; int rx_received; struct mvpp2_rx_queue *rxq; - u32 cause_rx_tx, cause_rx, cause_misc; u8 *data; - cause_rx_tx = mvpp2_read(port->priv, - MVPP2_ISR_RX_TX_CAUSE_REG(port->id)); - cause_rx_tx &= ~MVPP2_CAUSE_TXQ_OCCUP_DESC_ALL_MASK; - cause_misc = cause_rx_tx & MVPP2_CAUSE_MISC_SUM_MASK; - if (!cause_rx_tx && !cause_misc) - return 0; - - cause_rx = cause_rx_tx & MVPP2_CAUSE_RXQ_OCCUP_DESC_ALL_MASK; - /* Process RX packets */ - cause_rx |= port->pending_cause_rx; - rxq = mvpp2_get_rx_queue(port, cause_rx); + rxq = port->rxqs[0]; /* Get number of received packets and clamp the to-do */ rx_received = mvpp2_rxq_received(port, rxq->id);