From patchwork Wed Jun 21 08:31:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: stefanc@malvell.com X-Patchwork-Id: 778804 X-Patchwork-Delegate: sr@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3wt3Y11DDRz9ryr for ; Wed, 21 Jun 2017 22:14:13 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id D1E37C21C6B; Wed, 21 Jun 2017 12:13:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.7 required=5.0 tests=RCVD_IN_DNSWL_LOW autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 7EBDDC21C94; Wed, 21 Jun 2017 12:12:06 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id BD061C21C76; Wed, 21 Jun 2017 08:35:15 +0000 (UTC) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by lists.denx.de (Postfix) with ESMTPS id 272EBC21C73 for ; Wed, 21 Jun 2017 08:35:12 +0000 (UTC) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id v5L8Tksv004682; Wed, 21 Jun 2017 01:35:09 -0700 Received: from il-exch01.marvell.com ([199.203.130.101]) by mx0b-0016f401.pphosted.com with ESMTP id 2b6bsxuwmb-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 21 Jun 2017 01:35:09 -0700 Received: from SC-EXCH02.marvell.com (10.93.176.82) by IL-EXCH01.marvell.com (10.4.102.220) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Wed, 21 Jun 2017 11:35:06 +0300 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH02.marvell.com (10.93.176.82) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Wed, 21 Jun 2017 01:35:06 -0700 Received: from stefanc.pt.marvell.com (unknown [10.5.24.120]) by maili.marvell.com (Postfix) with ESMTP id 20C723F7040; Wed, 21 Jun 2017 01:35:03 -0700 (PDT) From: To: Date: Wed, 21 Jun 2017 11:31:30 +0300 Message-ID: <1498033898-15650-3-git-send-email-stefanc@malvell.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1498033898-15650-1-git-send-email-stefanc@malvell.com> References: <1498033898-15650-1-git-send-email-stefanc@malvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-06-21_01:, , signatures=0 X-Proofpoint-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1034 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1703280000 definitions=main-1706210143 X-Mailman-Approved-At: Wed, 21 Jun 2017 12:12:02 +0000 Cc: stefanc@malvell.com, joe.hershberger@ni.com, sr@denx.de, igall@marvell.com Subject: [U-Boot] [PATCH 02/10] net: mvpp2x: fix phy connected to wrong mdio issue X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Stefan Chulski This WA for mdio issue. U-boot 2017 don't have mdio driver and on MACHIATOBin board ports from CP1 connected to mdio on CP0. WA is to get mdio address from phy handler parent base address. WA should be removed after mdio driver implementation. Change-Id: Ice33c318a2872e750c8a2004763e6b2198c0537e Signed-off-by: Stefan Chulski Reviewed-on: http://vgitil04.il.marvell.com:8080/39032 Tested-by: iSoC Platform CI Reviewed-by: Igal Liberman --- drivers/net/mvpp2.c | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c index 2198b73..1264f14 100644 --- a/drivers/net/mvpp2.c +++ b/drivers/net/mvpp2.c @@ -31,6 +31,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -4739,10 +4740,11 @@ static int phy_info_parse(struct udevice *dev, struct mvpp2_port *port) { int port_node = dev_of_offset(dev); const char *phy_mode_str; - int phy_node; + int phy_node, mdio_off, cp_node; u32 id; u32 phyaddr = 0; int phy_mode = -1; + u64 mdio_addr; phy_node = fdtdec_lookup_phandle(gd->fdt_blob, port_node, "phy"); @@ -4752,6 +4754,28 @@ static int phy_info_parse(struct udevice *dev, struct mvpp2_port *port) dev_err(&pdev->dev, "could not find phy address\n"); return -1; } + mdio_off = fdt_parent_offset(gd->fdt_blob, phy_node); + + /* TODO: This WA for mdio issue. U-boot 2017 don't have + * mdio driver and on MACHIATOBin board ports from CP1 + * connected to mdio on CP0. + * WA is to get mdio address from phy handler parent + * base address. WA should be removed after + * mdio driver implementation. + */ + mdio_addr = fdtdec_get_uint(gd->fdt_blob, + mdio_off, "reg", 0); + + cp_node = fdt_parent_offset(gd->fdt_blob, mdio_off); + mdio_addr |= fdt_get_base_address((void *)gd->fdt_blob, + cp_node); + + port->priv->mdio_base = (void *)mdio_addr; + + if (port->priv->mdio_base < 0) { + dev_err(&pdev->dev, "could not find mdio base address\n"); + return -1; + } } else { phy_node = 0; }