From patchwork Thu Jun 1 11:25:54 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Meng Dongyang X-Patchwork-Id: 769633 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3wdlW95hyMz9s3s for ; Thu, 1 Jun 2017 21:29:57 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 917ACC21C95; Thu, 1 Jun 2017 11:28:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 3B825C21D1B; Thu, 1 Jun 2017 11:28:16 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 32CAAC21D26; Thu, 1 Jun 2017 11:23:45 +0000 (UTC) Received: from regular1.263xmail.com (regular1.263xmail.com [211.150.99.139]) by lists.denx.de (Postfix) with ESMTPS id 72F72C21CAC for ; Thu, 1 Jun 2017 11:23:09 +0000 (UTC) Received: from daniel.meng?rock-chips.com (unknown [192.168.167.158]) by regular1.263xmail.com (Postfix) with ESMTP id C793F553C; Thu, 1 Jun 2017 19:22:26 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 Received: from localhost.localdomain (localhost [127.0.0.1]) by smtp.263.net (Postfix) with ESMTP id F39083A3; Thu, 1 Jun 2017 19:22:27 +0800 (CST) X-RL-SENDER: daniel.meng@rock-chips.com X-FST-TO: sjg@chromium.org X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: daniel.meng@rock-chips.com X-UNIQUE-TAG: X-ATTACHMENT-NUM: 0 X-SENDER: daniel.meng@rock-chips.com X-DNS-TYPE: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (Postfix) whith ESMTP id 136787MZ9WV; Thu, 01 Jun 2017 19:22:28 +0800 (CST) From: Meng Dongyang To: sjg@chromium.org, marex@denx.de, u-boot@lists.denx.de Date: Thu, 1 Jun 2017 19:25:54 +0800 Message-Id: <1496316354-5493-1-git-send-email-daniel.meng@rock-chips.com> X-Mailer: git-send-email 1.9.1 Cc: frank.wang@rock-chips.com, wulf@rock-chips.com, chenjh@rock-chips.com Subject: [U-Boot] [PATCH v2 09/10] rockchip: dts: rk3328: support and enable dwc2 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Enable dwc2 controller and add fixed regulator for dwc2 controller to control vbus. Signed-off-by: Meng Dongyang Reviewed-by: Simon Glass --- Changes in v2: - Add fixed regulator to control vbus arch/arm/dts/rk3328-evb.dts | 14 ++++++++++++++ arch/arm/dts/rk3328.dtsi | 9 +++++++++ 2 files changed, 23 insertions(+) diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts index 4cf6d2e..220d0ab 100644 --- a/arch/arm/dts/rk3328-evb.dts +++ b/arch/arm/dts/rk3328-evb.dts @@ -15,6 +15,15 @@ stdout-path = &uart2; }; + vcc5v0_otg: vcc5v0-otg-drv { + compatible = "regulator-fixed"; + enable-active-high; + regulator-name = "vcc5v0_otg"; + gpio = <&gpio0 27 GPIO_ACTIVE_HIGH>; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + vcc5v0_host_xhci: vcc5v0-host-xhci-drv { compatible = "regulator-fixed"; enable-active-high; @@ -61,6 +70,11 @@ status = "okay"; }; +&usb20_otg { + vbus-supply = <&vcc5v0_otg>; + status = "okay"; +}; + &usb_host0_xhci { vbus-supply = <&vcc5v0_host_xhci>; status = "okay"; diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi index f18cfc2..1d81dad 100644 --- a/arch/arm/dts/rk3328.dtsi +++ b/arch/arm/dts/rk3328.dtsi @@ -460,6 +460,15 @@ status = "disabled"; }; + usb20_otg: usb@ff580000 { + compatible = "rockchip,rk3328-usb", "rockchip,rk3066-usb", + "snps,dwc2"; + reg = <0x0 0xff580000 0x0 0x40000>; + interrupts = ; + dr_mode = "otg"; + status = "disabled"; + }; + sdmmc_ext: rksdmmc@ff5f0000 { compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0xff5f0000 0x0 0x4000>;