diff mbox

[U-Boot,3/7] ti: wdt: omap: Disable watchdog timer before performing initialization

Message ID 1487543082-24746-5-git-send-email-lukma@denx.de
State Accepted
Commit b633b9c8fe26519f3abaee3724115fec7b86aab2
Delegated to: Tom Rini
Headers show

Commit Message

Lukasz Majewski Feb. 19, 2017, 10:24 p.m. UTC
The OMAP WDT IP block requires to be stopped before any write to its
registers is performed.

This problem has been thoroughly described in Linux kernel:

"watchdog: omap: assert the counter being stopped before reprogramming:
SHA1: 530c11d432727c697629ad5f9d00ee8e2864d453

Signed-off-by: Lukasz Majewski <lukma@denx.de>
---
 drivers/watchdog/omap_wdt.c | 37 ++++++++++++++++++++++---------------
 1 file changed, 22 insertions(+), 15 deletions(-)

Comments

Tom Rini Feb. 20, 2017, 2:25 a.m. UTC | #1
On Sun, Feb 19, 2017 at 11:24:38PM +0100, Lukasz Majewski wrote:

> The OMAP WDT IP block requires to be stopped before any write to its
> registers is performed.
> 
> This problem has been thoroughly described in Linux kernel:
> 
> "watchdog: omap: assert the counter being stopped before reprogramming:
> SHA1: 530c11d432727c697629ad5f9d00ee8e2864d453
> 
> Signed-off-by: Lukasz Majewski <lukma@denx.de>

Reviewed-by: Tom Rini <trini@konsulko.com>
Lukasz Majewski April 7, 2017, 8:29 p.m. UTC | #2
Hi Tom,

> On Sun, Feb 19, 2017 at 11:24:38PM +0100, Lukasz Majewski wrote:
> 
> > The OMAP WDT IP block requires to be stopped before any write to its
> > registers is performed.
> > 
> > This problem has been thoroughly described in Linux kernel:
> > 
> > "watchdog: omap: assert the counter being stopped before
> > reprogramming: SHA1: 530c11d432727c697629ad5f9d00ee8e2864d453
> > 
> > Signed-off-by: Lukasz Majewski <lukma@denx.de>
> 
> Reviewed-by: Tom Rini <trini@konsulko.com>
> 

Could this patch be applied alone? Preparing reset of this patch set is
a bit more tricky (since includes verbose testing).


Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
Tom Rini April 10, 2017, 6:24 p.m. UTC | #3
On Sun, Feb 19, 2017 at 11:24:38PM +0100, Lukasz Majewski wrote:

> The OMAP WDT IP block requires to be stopped before any write to its
> registers is performed.
> 
> This problem has been thoroughly described in Linux kernel:
> 
> "watchdog: omap: assert the counter being stopped before reprogramming:
> SHA1: 530c11d432727c697629ad5f9d00ee8e2864d453
> 
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> Reviewed-by: Tom Rini <trini@konsulko.com>

Applied to u-boot/master, thanks!
diff mbox

Patch

diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c
index 7ea4b60..7b1f429 100644
--- a/drivers/watchdog/omap_wdt.c
+++ b/drivers/watchdog/omap_wdt.c
@@ -81,10 +81,32 @@  static int omap_wdt_set_timeout(unsigned int timeout)
 	return 0;
 }
 
+void hw_watchdog_disable(void)
+{
+	struct wd_timer *wdt = (struct wd_timer *)WDT_BASE;
+
+	/*
+	 * Disable watchdog
+	 */
+	writel(0xAAAA, &wdt->wdtwspr);
+	while (readl(&wdt->wdtwwps) != 0x0)
+		;
+	writel(0x5555, &wdt->wdtwspr);
+	while (readl(&wdt->wdtwwps) != 0x0)
+		;
+}
+
 void hw_watchdog_init(void)
 {
 	struct wd_timer *wdt = (struct wd_timer *)WDT_BASE;
 
+	/*
+	 * Make sure the watchdog is disabled. This is unfortunately required
+	 * because writing to various registers with the watchdog running has no
+	 * effect.
+	 */
+	hw_watchdog_disable();
+
 	/* initialize prescaler */
 	while (readl(&wdt->wdtwwps) & WDT_WWPS_PEND_WCLR)
 		;
@@ -104,18 +126,3 @@  void hw_watchdog_init(void)
 	while ((readl(&wdt->wdtwwps)) & WDT_WWPS_PEND_WSPR)
 		;
 }
-
-void hw_watchdog_disable(void)
-{
-	struct wd_timer *wdt = (struct wd_timer *)WDT_BASE;
-
-	/*
-	 * Disable watchdog
-	 */
-	writel(0xAAAA, &wdt->wdtwspr);
-	while (readl(&wdt->wdtwwps) != 0x0)
-		;
-	writel(0x5555, &wdt->wdtwspr);
-	while (readl(&wdt->wdtwwps) != 0x0)
-		;
-}