| Message ID | 1478170950-16083-2-git-send-email-priyanka.jain@nxp.com |
|---|---|
| State | Superseded |
| Delegated to: | York Sun |
| Headers | show |
On 11/03/2016 04:12 AM, Priyanka Jain wrote: > Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> > --- > arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 7 ------- > arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 9 +++++++++ > .../include/asm/arch-fsl-layerscape/immap_lsch3.h | 6 +++--- > 3 files changed, 12 insertions(+), 10 deletions(-) > > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c > index b7a2e0c..2863e18 100644 > --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c > +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c > @@ -305,13 +305,6 @@ u32 fsl_qoriq_core_to_type(unsigned int core) > return -1; /* cannot identify the cluster */ > } > > -uint get_svr(void) > -{ > - struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); > - > - return gur_in32(&gur->svr); > -} > - > #ifdef CONFIG_DISPLAY_CPUINFO > int print_cpuinfo(void) > { > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S > index 5d0b7a4..ee20c27 100644 > --- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S > +++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S > @@ -13,6 +13,9 @@ > #ifdef CONFIG_MP > #include <asm/arch/mp.h> > #endif > +#ifdef CONFIG_FSL_LSCH3 > +#include <asm/arch-fsl-layerscape/immap_lsch3.h> > +#endif > > ENTRY(lowlevel_init) > mov x29, lr /* Save LR */ > @@ -199,6 +202,12 @@ ENTRY(lowlevel_init) > ENDPROC(lowlevel_init) > > #ifdef CONFIG_FSL_LSCH3 > + .globl get_svr > +get_svr: > + ldr x1, =FSL_LSCH3_SVR > + ldr w0, [x1] > + ret > + This has an issue with non_lsch3 SoCs. You will see compiling error on them, for example ls1012afrdm_qspi. York
> -----Original Message----- > From: york sun > Sent: Monday, November 14, 2016 10:20 PM > To: Priyanka Jain <priyanka.jain@nxp.com>; u-boot@lists.denx.de > Subject: Re: [PATCH 1/6][v3] armv8: lsch3: Add generic get_svr() in assembly > > On 11/03/2016 04:12 AM, Priyanka Jain wrote: > > Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> > > --- > > arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 7 ------- > > arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 9 +++++++++ > > .../include/asm/arch-fsl-layerscape/immap_lsch3.h | 6 +++--- > > 3 files changed, 12 insertions(+), 10 deletions(-) > > > > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c > > b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c > > index b7a2e0c..2863e18 100644 > > --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c > > +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c > > @@ -305,13 +305,6 @@ u32 fsl_qoriq_core_to_type(unsigned int core) > > return -1; /* cannot identify the cluster */ > > } > > > > -uint get_svr(void) > > -{ > > - struct ccsr_gur __iomem *gur = (void > *)(CONFIG_SYS_FSL_GUTS_ADDR); > > - > > - return gur_in32(&gur->svr); > > -} > > - > > #ifdef CONFIG_DISPLAY_CPUINFO > > int print_cpuinfo(void) > > { > > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S > > b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S > > index 5d0b7a4..ee20c27 100644 > > --- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S > > +++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S > > @@ -13,6 +13,9 @@ > > #ifdef CONFIG_MP > > #include <asm/arch/mp.h> > > #endif > > +#ifdef CONFIG_FSL_LSCH3 > > +#include <asm/arch-fsl-layerscape/immap_lsch3.h> > > +#endif > > > > ENTRY(lowlevel_init) > > mov x29, lr /* Save LR */ > > @@ -199,6 +202,12 @@ ENTRY(lowlevel_init) > > ENDPROC(lowlevel_init) > > > > #ifdef CONFIG_FSL_LSCH3 > > + .globl get_svr > > +get_svr: > > + ldr x1, =FSL_LSCH3_SVR > > + ldr w0, [x1] > > + ret > > + > > This has an issue with non_lsch3 SoCs. You will see compiling error on them, > for example ls1012afrdm_qspi. > > York I will check this for ls1012a devices and send updated patch (if required) Priyanka
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index b7a2e0c..2863e18 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -305,13 +305,6 @@ u32 fsl_qoriq_core_to_type(unsigned int core) return -1; /* cannot identify the cluster */ } -uint get_svr(void) -{ - struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); - - return gur_in32(&gur->svr); -} - #ifdef CONFIG_DISPLAY_CPUINFO int print_cpuinfo(void) { diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S index 5d0b7a4..ee20c27 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S +++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S @@ -13,6 +13,9 @@ #ifdef CONFIG_MP #include <asm/arch/mp.h> #endif +#ifdef CONFIG_FSL_LSCH3 +#include <asm/arch-fsl-layerscape/immap_lsch3.h> +#endif ENTRY(lowlevel_init) mov x29, lr /* Save LR */ @@ -199,6 +202,12 @@ ENTRY(lowlevel_init) ENDPROC(lowlevel_init) #ifdef CONFIG_FSL_LSCH3 + .globl get_svr +get_svr: + ldr x1, =FSL_LSCH3_SVR + ldr w0, [x1] + ret + hnf_pstate_poll: /* x0 has the desired status, return 0 for success, 1 for timeout * clobber x1, x2, x3, x4, x6, x7 diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h index 7acba27..09c1033 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h @@ -27,6 +27,7 @@ #define CONFIG_SYS_FSL_PMU_CLTBENR (CONFIG_SYS_FSL_PMU_ADDR + \ 0x18A0) #define FSL_PMU_PCTBENR_OFFSET (CONFIG_SYS_FSL_PMU_ADDR + 0x8A0) +#define FSL_LSCH3_SVR (CONFIG_SYS_FSL_GUTS_ADDR + 0xA4) #define CONFIG_SYS_FSL_WRIOP1_ADDR (CONFIG_SYS_IMMR + 0x7B80000) #define CONFIG_SYS_FSL_WRIOP1_MDIO1 (CONFIG_SYS_FSL_WRIOP1_ADDR + 0x16000) @@ -153,7 +154,7 @@ #define TP_CLUSTER_INIT_MASK 0x0000003f /* initiator mask */ #define TP_INIT_PER_CLUSTER 4 /* This is chassis generation 3 */ - +#ifndef __ASSEMBLY__ struct sys_info { unsigned long freq_processor[CONFIG_MAX_CPUS]; unsigned long freq_systembus; @@ -317,6 +318,5 @@ struct ccsr_reset { u32 ip_rev2; /* 0xbfc */ }; -uint get_svr(void); - +#endif /*__ASSEMBLY__*/ #endif /* __ARCH_FSL_LSCH3_IMMAP_H_ */
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> --- arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 7 ------- arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 9 +++++++++ .../include/asm/arch-fsl-layerscape/immap_lsch3.h | 6 +++--- 3 files changed, 12 insertions(+), 10 deletions(-)