Message ID | 1453771213-8744-3-git-send-email-qiang.zhao@nxp.com |
---|---|
State | Superseded |
Headers | show |
> -----Original Message----- > From: Zhao Qiang [mailto:qiang.zhao@nxp.com] > Sent: Tuesday, January 26, 2016 9:20 AM > To: Mingkai Hu > Cc: trini@konsulko.com; york sun; u-boot@lists.denx.de; Qiang Zhao > Subject: [PATCH v2 3/3] QE: assgin pins to QE-HDLC > > qe-hdlc and usb multi-use the pins, when set hwconfig=qe-hdlc, assign the > pins to qe-hdlc, if not, assgin it to usb > > Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> > --- > Changes for v2: > - NA > > board/freescale/ls1043ardb/ls1043ardb.c | 54 ++++++++++++++++++++++++--- > ------ > 1 file changed, 39 insertions(+), 15 deletions(-) > > diff --git a/board/freescale/ls1043ardb/ls1043ardb.c > b/board/freescale/ls1043ardb/ls1043ardb.c > index 834fdff..042a59f 100644 > --- a/board/freescale/ls1043ardb/ls1043ardb.c > +++ b/board/freescale/ls1043ardb/ls1043ardb.c > @@ -75,23 +75,8 @@ int dram_init(void) > > int board_early_init_f(void) > { > - struct ccsr_scfg *scfg = (struct ccsr_scfg > *)CONFIG_SYS_FSL_SCFG_ADDR; > - u32 usb_pwrfault; > - > fsl_lsch2_early_init_f(); > > -#ifdef CONFIG_HAS_FSL_XHCI_USB > - out_be32(&scfg->rcwpmuxcr0, 0x3333); > - out_be32(&scfg->usbdrvvbus_selcr, SCFG_USBDRVVBUS_SELCR_USB1); > - usb_pwrfault = (SCFG_USBPWRFAULT_DEDICATED << > - SCFG_USBPWRFAULT_USB3_SHIFT) | > - (SCFG_USBPWRFAULT_DEDICATED << > - SCFG_USBPWRFAULT_USB2_SHIFT) | > - (SCFG_USBPWRFAULT_SHARED << > - SCFG_USBPWRFAULT_USB1_SHIFT); > - out_be32(&scfg->usbpwrfault_selcr, usb_pwrfault); > -#endif > - > return 0; > } > It's better to split this patch to two patches: the first one is to move the USB config to config_board_mux, The second patch is to add the qe-hdlc support. this is more clear. > @@ -126,6 +111,27 @@ int board_init(void) > > int config_board_mux(void) > { > + struct ccsr_scfg *scfg = (struct ccsr_scfg > *)CONFIG_SYS_FSL_SCFG_ADDR; > + u32 usb_pwrfault; > + > + if (hwconfig("qe-hdlc")) { > + out_be32(&scfg->rcwpmuxcr0, > + (in_be32(&scfg->rcwpmuxcr0) & ~0xff00) | 0x6600); > + printf("Assign to qe-hdlc clk, rcwpmuxcr0=%x\n", > + in_be32(&scfg->rcwpmuxcr0)); > + } else { > +#ifdef CONFIG_HAS_FSL_XHCI_USB > + out_be32(&scfg->rcwpmuxcr0, 0x3333); > + out_be32(&scfg->usbdrvvbus_selcr, SCFG_USBDRVVBUS_SELCR_USB1); > + usb_pwrfault = (SCFG_USBPWRFAULT_DEDICATED << > + SCFG_USBPWRFAULT_USB3_SHIFT) | > + (SCFG_USBPWRFAULT_DEDICATED << > + SCFG_USBPWRFAULT_USB2_SHIFT) | > + (SCFG_USBPWRFAULT_SHARED << > + SCFG_USBPWRFAULT_USB1_SHIFT); > + out_be32(&scfg->usbpwrfault_selcr, usb_pwrfault); #endif > + } > return 0; > } > > @@ -152,6 +158,16 @@ int misc_init_r(void) } #endif > > +void fdt_del_qe(void *blob) > +{ > + int nodeoff = 0; > + > + while ((nodeoff = fdt_node_offset_by_compatible(blob, 0, > + "fsl,qe")) >= 0) { > + fdt_del_node(blob, nodeoff); > + } > +} > + > int ft_board_setup(void *blob, bd_t *bd) { > u64 base[CONFIG_NR_DRAM_BANKS]; > @@ -169,6 +185,14 @@ int ft_board_setup(void *blob, bd_t *bd) #ifdef > CONFIG_SYS_DPAA_FMAN > fdt_fixup_fman_ethernet(blob); > #endif > + > + if (hwconfig("qe-hdlc")) > +#ifdef CONFIG_HAS_FSL_XHCI_USB > + fdt_del_node_and_alias(blob, "usb1"); #endif > + else if (!hwconfig("qe-uart")) > + fdt_del_qe(blob); > + Can we change it to the following? + if (hwconfig("qe-hdlc") || hwconfig("qe-uart")) +#ifdef CONFIG_HAS_FSL_XHCI_USB + fdt_del_node_and_alias(blob, "usb1"); +#endif + else + fdt_del_qe(blob); + Thanks, Mingkai
> -----Original Message----- > From: Mingkai Hu > Sent: Tuesday, January 26, 2016 12:23 PM > To: Qiang Zhao <qiang.zhao@nxp.com> > Cc: trini@konsulko.com; york sun <york.sun@nxp.com>; u-boot@lists.denx.de; > Qiang Zhao <qiang.zhao@nxp.com> > Subject: RE: [PATCH v2 3/3] QE: assgin pins to QE-HDLC > > > > > -----Original Message----- > > From: Zhao Qiang [mailto:qiang.zhao@nxp.com] > > Sent: Tuesday, January 26, 2016 9:20 AM > > To: Mingkai Hu > > Cc: trini@konsulko.com; york sun; u-boot@lists.denx.de; Qiang Zhao > > Subject: [PATCH v2 3/3] QE: assgin pins to QE-HDLC > > > > qe-hdlc and usb multi-use the pins, when set hwconfig=qe-hdlc, assign > > the pins to qe-hdlc, if not, assgin it to usb > > > > Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> > > --- > > Changes for v2: > > - NA > > > > board/freescale/ls1043ardb/ls1043ardb.c | 54 > > ++++++++++++++++++++++++--- > > ------ > > 1 file changed, 39 insertions(+), 15 deletions(-) > > > > diff --git a/board/freescale/ls1043ardb/ls1043ardb.c > > b/board/freescale/ls1043ardb/ls1043ardb.c > > index 834fdff..042a59f 100644 > > --- a/board/freescale/ls1043ardb/ls1043ardb.c > > +++ b/board/freescale/ls1043ardb/ls1043ardb.c > > @@ -75,23 +75,8 @@ int dram_init(void) > > > > int board_early_init_f(void) > > { > > - struct ccsr_scfg *scfg = (struct ccsr_scfg > > *)CONFIG_SYS_FSL_SCFG_ADDR; > > - u32 usb_pwrfault; > > - > > fsl_lsch2_early_init_f(); > > > > -#ifdef CONFIG_HAS_FSL_XHCI_USB > > - out_be32(&scfg->rcwpmuxcr0, 0x3333); > > - out_be32(&scfg->usbdrvvbus_selcr, > SCFG_USBDRVVBUS_SELCR_USB1); > > - usb_pwrfault = (SCFG_USBPWRFAULT_DEDICATED << > > - SCFG_USBPWRFAULT_USB3_SHIFT) | > > - (SCFG_USBPWRFAULT_DEDICATED << > > - SCFG_USBPWRFAULT_USB2_SHIFT) | > > - (SCFG_USBPWRFAULT_SHARED << > > - SCFG_USBPWRFAULT_USB1_SHIFT); > > - out_be32(&scfg->usbpwrfault_selcr, usb_pwrfault); > > -#endif > > - > > return 0; > > } > > > > It's better to split this patch to two patches: the first one is to move the USB > config to config_board_mux, The second patch is to add the qe-hdlc support. > this is more clear. Great, change in next version. > > > @@ -126,6 +111,27 @@ int board_init(void) > > > > int config_board_mux(void) > > { > > + struct ccsr_scfg *scfg = (struct ccsr_scfg > > *)CONFIG_SYS_FSL_SCFG_ADDR; > > + u32 usb_pwrfault; > > + > > + if (hwconfig("qe-hdlc")) { > > + out_be32(&scfg->rcwpmuxcr0, > > + (in_be32(&scfg->rcwpmuxcr0) & ~0xff00) | 0x6600); > > + printf("Assign to qe-hdlc clk, rcwpmuxcr0=%x\n", > > + in_be32(&scfg->rcwpmuxcr0)); > > + } else { > > +#ifdef CONFIG_HAS_FSL_XHCI_USB > > + out_be32(&scfg->rcwpmuxcr0, 0x3333); > > + out_be32(&scfg->usbdrvvbus_selcr, > SCFG_USBDRVVBUS_SELCR_USB1); > > + usb_pwrfault = (SCFG_USBPWRFAULT_DEDICATED << > > + SCFG_USBPWRFAULT_USB3_SHIFT) | > > + (SCFG_USBPWRFAULT_DEDICATED << > > + SCFG_USBPWRFAULT_USB2_SHIFT) | > > + (SCFG_USBPWRFAULT_SHARED << > > + SCFG_USBPWRFAULT_USB1_SHIFT); > > + out_be32(&scfg->usbpwrfault_selcr, usb_pwrfault); #endif > > + } > > return 0; > > } > > > > @@ -152,6 +158,16 @@ int misc_init_r(void) } #endif > > > > +void fdt_del_qe(void *blob) > > +{ > > + int nodeoff = 0; > > + > > + while ((nodeoff = fdt_node_offset_by_compatible(blob, 0, > > + "fsl,qe")) >= 0) { > > + fdt_del_node(blob, nodeoff); > > + } > > +} > > + > > int ft_board_setup(void *blob, bd_t *bd) { > > u64 base[CONFIG_NR_DRAM_BANKS]; > > @@ -169,6 +185,14 @@ int ft_board_setup(void *blob, bd_t *bd) #ifdef > > CONFIG_SYS_DPAA_FMAN > > fdt_fixup_fman_ethernet(blob); > > #endif > > + > > + if (hwconfig("qe-hdlc")) > > +#ifdef CONFIG_HAS_FSL_XHCI_USB > > + fdt_del_node_and_alias(blob, "usb1"); #endif > > + else if (!hwconfig("qe-uart")) > > + fdt_del_qe(blob); > > + > > Can we change it to the following? > > + if (hwconfig("qe-hdlc") || hwconfig("qe-uart")) #ifdef > +CONFIG_HAS_FSL_XHCI_USB > + fdt_del_node_and_alias(blob, "usb1"); #endif > + else > + fdt_del_qe(blob); > + Usb multi-used pins with QE-HDLC, but not QE-UART. It is not necessary to delete usb node when use qe-uart. Regards -Zhao QIang
diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c index 834fdff..042a59f 100644 --- a/board/freescale/ls1043ardb/ls1043ardb.c +++ b/board/freescale/ls1043ardb/ls1043ardb.c @@ -75,23 +75,8 @@ int dram_init(void) int board_early_init_f(void) { - struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR; - u32 usb_pwrfault; - fsl_lsch2_early_init_f(); -#ifdef CONFIG_HAS_FSL_XHCI_USB - out_be32(&scfg->rcwpmuxcr0, 0x3333); - out_be32(&scfg->usbdrvvbus_selcr, SCFG_USBDRVVBUS_SELCR_USB1); - usb_pwrfault = (SCFG_USBPWRFAULT_DEDICATED << - SCFG_USBPWRFAULT_USB3_SHIFT) | - (SCFG_USBPWRFAULT_DEDICATED << - SCFG_USBPWRFAULT_USB2_SHIFT) | - (SCFG_USBPWRFAULT_SHARED << - SCFG_USBPWRFAULT_USB1_SHIFT); - out_be32(&scfg->usbpwrfault_selcr, usb_pwrfault); -#endif - return 0; } @@ -126,6 +111,27 @@ int board_init(void) int config_board_mux(void) { + struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR; + u32 usb_pwrfault; + + if (hwconfig("qe-hdlc")) { + out_be32(&scfg->rcwpmuxcr0, + (in_be32(&scfg->rcwpmuxcr0) & ~0xff00) | 0x6600); + printf("Assign to qe-hdlc clk, rcwpmuxcr0=%x\n", + in_be32(&scfg->rcwpmuxcr0)); + } else { +#ifdef CONFIG_HAS_FSL_XHCI_USB + out_be32(&scfg->rcwpmuxcr0, 0x3333); + out_be32(&scfg->usbdrvvbus_selcr, SCFG_USBDRVVBUS_SELCR_USB1); + usb_pwrfault = (SCFG_USBPWRFAULT_DEDICATED << + SCFG_USBPWRFAULT_USB3_SHIFT) | + (SCFG_USBPWRFAULT_DEDICATED << + SCFG_USBPWRFAULT_USB2_SHIFT) | + (SCFG_USBPWRFAULT_SHARED << + SCFG_USBPWRFAULT_USB1_SHIFT); + out_be32(&scfg->usbpwrfault_selcr, usb_pwrfault); +#endif + } return 0; } @@ -152,6 +158,16 @@ int misc_init_r(void) } #endif +void fdt_del_qe(void *blob) +{ + int nodeoff = 0; + + while ((nodeoff = fdt_node_offset_by_compatible(blob, 0, + "fsl,qe")) >= 0) { + fdt_del_node(blob, nodeoff); + } +} + int ft_board_setup(void *blob, bd_t *bd) { u64 base[CONFIG_NR_DRAM_BANKS]; @@ -169,6 +185,14 @@ int ft_board_setup(void *blob, bd_t *bd) #ifdef CONFIG_SYS_DPAA_FMAN fdt_fixup_fman_ethernet(blob); #endif + + if (hwconfig("qe-hdlc")) +#ifdef CONFIG_HAS_FSL_XHCI_USB + fdt_del_node_and_alias(blob, "usb1"); +#endif + else if (!hwconfig("qe-uart")) + fdt_del_qe(blob); + return 0; }
qe-hdlc and usb multi-use the pins, when set hwconfig=qe-hdlc, assign the pins to qe-hdlc, if not, assgin it to usb Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> --- Changes for v2: - NA board/freescale/ls1043ardb/ls1043ardb.c | 54 ++++++++++++++++++++++++--------- 1 file changed, 39 insertions(+), 15 deletions(-)