| Message ID | 1452727540-3249-23-git-send-email-sjg@chromium.org |
|---|---|
| State | Accepted |
| Commit | 342999f9b3ce6c5c30b100549799e646e7fa70c5 |
| Delegated to: | Simon Glass |
| Headers | show |
diff --git a/drivers/clk/clk_rk3288.c b/drivers/clk/clk_rk3288.c index d507b48..d6d2896 100644 --- a/drivers/clk/clk_rk3288.c +++ b/drivers/clk/clk_rk3288.c @@ -541,8 +541,8 @@ ulong rk3288_get_periph_rate(struct udevice *dev, int periph) gclk_rate = clk_get_rate(gclk); switch (periph) { case HCLK_EMMC: + case HCLK_SDMMC: case HCLK_SDIO0: - case HCLK_SDIO1: new_rate = rockchip_mmc_get_clk(priv->cru, gclk_rate, periph); break; case SCLK_SPI0:
We can use the new clk_get_by_index() function to get the correct clock. Signed-off-by: Simon Glass <sjg@chromium.org> --- drivers/clk/clk_rk3288.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)