diff mbox

[U-Boot,1/3] imx: apbh_dma: Update APBH-DMA for MX7D

Message ID 1450775064-2399-1-git-send-email-van.freenix@gmail.com
State Accepted
Commit 1fc4f80495a494f8277987fa0f3976d1ffe81dc7
Delegated to: Stefano Babic
Headers show

Commit Message

Peng Fan Dec. 22, 2015, 9:04 a.m. UTC 
From: Peng Fan <peng.fan@nxp.com>

Update APBH-DMA driver and head files to support i.MX7D

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
---
 arch/arm/include/asm/imx-common/dma.h       | 2 +-
 arch/arm/include/asm/imx-common/regs-apbh.h | 6 +++---
 drivers/dma/apbh_dma.c                      | 2 +-
 3 files changed, 5 insertions(+), 5 deletions(-)

Comments

Stefano Babic Jan. 24, 2016, 11:10 a.m. UTC | #1 
On 22/12/2015 10:04, Peng Fan wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> Update APBH-DMA driver and head files to support i.MX7D
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> Cc: Stefano Babic <sbabic@denx.de>
> ---

Applied to u-boot-imx, thanks!

Best regards,
Stefano Babic
diff mbox

Patch

diff --git a/arch/arm/include/asm/imx-common/dma.h b/arch/arm/include/asm/imx-common/dma.h
index 7d421b3..1aec4f9 100644
--- a/arch/arm/include/asm/imx-common/dma.h
+++ b/arch/arm/include/asm/imx-common/dma.h
@@ -59,7 +59,7 @@  enum {
 	MXS_DMA_CHANNEL_AHB_APBH_RESERVED1,
 	MXS_MAX_DMA_CHANNELS,
 };
-#elif defined(CONFIG_MX6)
+#elif defined(CONFIG_MX6) || defined(CONFIG_MX7)
 enum {
 	MXS_DMA_CHANNEL_AHB_APBH_GPMI0 = 0,
 	MXS_DMA_CHANNEL_AHB_APBH_GPMI1,
diff --git a/arch/arm/include/asm/imx-common/regs-apbh.h b/arch/arm/include/asm/imx-common/regs-apbh.h
index ca77436..391452c 100644
--- a/arch/arm/include/asm/imx-common/regs-apbh.h
+++ b/arch/arm/include/asm/imx-common/regs-apbh.h
@@ -96,7 +96,7 @@  struct mxs_apbh_regs {
 	mxs_reg_32(hw_apbh_version)
 };
 
-#elif (defined(CONFIG_MX28) || defined(CONFIG_MX6))
+#elif (defined(CONFIG_MX28) || defined(CONFIG_MX6) || defined(CONFIG_MX7))
 struct mxs_apbh_regs {
 	mxs_reg_32(hw_apbh_ctrl0)
 	mxs_reg_32(hw_apbh_ctrl1)
@@ -275,7 +275,7 @@  struct mxs_apbh_regs {
 #define	APBH_CTRL0_CLKGATE_CHANNEL_NAND7		0x0800
 #define	APBH_CTRL0_CLKGATE_CHANNEL_HSADC		0x1000
 #define	APBH_CTRL0_CLKGATE_CHANNEL_LCDIF		0x2000
-#elif defined(CONFIG_MX6)
+#elif (defined(CONFIG_MX6) || defined(CONFIG_MX7))
 #define	APBH_CTRL0_CLKGATE_CHANNEL_OFFSET		0
 #define	APBH_CTRL0_CLKGATE_CHANNEL_NAND0		0x0001
 #define	APBH_CTRL0_CLKGATE_CHANNEL_NAND1		0x0002
@@ -391,7 +391,7 @@  struct mxs_apbh_regs {
 #define	APBH_CHANNEL_CTRL_FREEZE_CHANNEL_LCDIF		0x2000
 #endif
 
-#if defined(CONFIG_MX6)
+#if (defined(CONFIG_MX6) || defined(CONFIG_MX7))
 #define	APBH_CHANNEL_CTRL_RESET_CHANNEL_OFFSET		16
 #endif
 
diff --git a/drivers/dma/apbh_dma.c b/drivers/dma/apbh_dma.c
index 22defcd..a6dc935 100644
--- a/drivers/dma/apbh_dma.c
+++ b/drivers/dma/apbh_dma.c
@@ -215,7 +215,7 @@  static int mxs_dma_reset(int channel)
 #if defined(CONFIG_MX23)
 	uint32_t setreg = (uint32_t)(&apbh_regs->hw_apbh_ctrl0_set);
 	uint32_t offset = APBH_CTRL0_RESET_CHANNEL_OFFSET;
-#elif (defined(CONFIG_MX28) || defined(CONFIG_MX6))
+#elif (defined(CONFIG_MX28) || defined(CONFIG_MX6) || defined(CONFIG_MX7))
 	uint32_t setreg = (uint32_t)(&apbh_regs->hw_apbh_channel_ctrl_set);
 	uint32_t offset = APBH_CHANNEL_CTRL_RESET_CHANNEL_OFFSET;
 #endif