@@ -41,8 +41,8 @@
void otg_phy_init(struct dwc2_udc *dev)
{
unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;
- struct s3c_usbotg_phy *phy =
- (struct s3c_usbotg_phy *)dev->pdata->regs_phy;
+ struct dwc2_usbotg_phy *phy =
+ (struct dwc2_usbotg_phy *)dev->pdata->regs_phy;
dev->pdata->phy_control(1);
@@ -79,8 +79,8 @@ void otg_phy_init(struct dwc2_udc *dev)
void otg_phy_off(struct dwc2_udc *dev)
{
unsigned int usb_phy_ctrl = dev->pdata->usb_phy_ctrl;
- struct s3c_usbotg_phy *phy =
- (struct s3c_usbotg_phy *)dev->pdata->regs_phy;
+ struct dwc2_usbotg_phy *phy =
+ (struct dwc2_usbotg_phy *)dev->pdata->regs_phy;
/* reset controller just in case */
writel(PHY_SW_RST0, &phy->rstcon);
@@ -12,7 +12,7 @@
#define __ASM_ARCH_REGS_USB_OTG_HS_H
/* USB2.0 OTG Controller register */
-struct s3c_usbotg_phy {
+struct dwc2_usbotg_phy {
u32 phypwr;
u32 phyclk;
u32 rstcon;
The driver is actually for the Designware DWC2 controller. This patch renames struct s3c_usbotg_phy to struct dwc2_usbotg_phy to make things more obvious and clear. Signed-off-by: Marek Vasut <marex@denx.de> --- drivers/usb/gadget/s3c_udc_otg_phy.c | 8 ++++---- drivers/usb/gadget/s3c_udc_otg_regs.h | 2 +- 2 files changed, 5 insertions(+), 5 deletions(-)