From patchwork Fri Nov 27 00:43:23 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeffy Chen X-Patchwork-Id: 549323 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 04E0F140306 for ; Fri, 27 Nov 2015 18:09:35 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 0EA664B906; Fri, 27 Nov 2015 08:09:31 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id p9EN5W303eqq; Fri, 27 Nov 2015 08:09:31 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B70284B90C; Fri, 27 Nov 2015 08:08:55 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 313D84B8D9 for ; Fri, 27 Nov 2015 04:42:12 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id qCPLu6unCVzu for ; Fri, 27 Nov 2015 04:42:12 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from regular1.263xmail.com (regular1.263xmail.com [211.150.99.133]) by theia.denx.de (Postfix) with ESMTPS id 2E5454B8DB for ; Fri, 27 Nov 2015 04:42:06 +0100 (CET) Received: from jeffy.chen?rock-chips.com (unknown [192.168.167.110]) by regular1.263xmail.com (Postfix) with SMTP id 0910A83A8; Fri, 27 Nov 2015 11:34:55 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 Received: from localhost (localhost.localdomain [127.0.0.1]) by smtp.263.net (Postfix) with ESMTP id 65EC32D427; Fri, 27 Nov 2015 11:34:50 +0800 (CST) X-RL-SENDER: jeffy.chen@rock-chips.com X-FST-TO: u-boot@lists.denx.de X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: jeffy.chen@rock-chips.com X-UNIQUE-TAG: X-ATTACHMENT-NUM: 0 X-SENDER: cjf@rock-chips.com X-DNS-TYPE: 0 Received: from localhost (unknown [58.22.7.114]) by smtp.263.net (Postfix) whith ESMTP id 17848IIVGBO; Fri, 27 Nov 2015 11:34:52 +0800 (CST) From: Jeffy Chen To: u-boot@lists.denx.de Date: Fri, 27 Nov 2015 08:43:23 +0800 Message-Id: <1448585005-7234-2-git-send-email-jeffy.chen@rock-chips.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1448585005-7234-1-git-send-email-jeffy.chen@rock-chips.com> References: <1448585005-7234-1-git-send-email-jeffy.chen@rock-chips.com> X-Mailman-Approved-At: Fri, 27 Nov 2015 08:08:36 +0100 Cc: thomas.petazzoni@free-electrons.com, guilherme.maciel.ferreira@gmail.com, jeffy.chen@rock-chips.com, ruchika.gupta@freescale.com, albert.aribaud@3adev.fr, sr@denx.de Subject: [U-Boot] [PATCH v1 1/3] Revert "rockchip: Add max spl size & spl header configs" X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This reverts commit 10b4615f9d7e177ec7fe644fbb2616e0e0956f6e Conflicts: tools/rkcommon.h Signed-off-by: Jeffy Chen Acked-by: Simon Glass --- arch/arm/mach-rockchip/Kconfig | 15 --------------- arch/arm/mach-rockchip/rk3036/Kconfig | 6 ------ arch/arm/mach-rockchip/rk3288/Kconfig | 6 ------ tools/Makefile | 8 +------- tools/rkcommon.c | 2 +- tools/rkimage.c | 2 +- tools/rksd.c | 4 ++-- tools/rkspi.c | 4 ++-- 8 files changed, 7 insertions(+), 40 deletions(-) diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index ccff81a..746d9f6 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -17,21 +17,6 @@ config ROCKCHIP_RK3036 and video codec support. Peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs. -config ROCKCHIP_SPL_HDR - string "Header of rockchip's spl loader" - help - Rockchip's bootrom requires the spl loader to start with a 4-bytes - header. The content of this header depends on the chip type. - -config ROCKCHIP_MAX_SPL_SIZE - hex "Max size of rockchip's spl loader" - help - Different chip may have different sram size. And if we want to jump - back to the bootrom after spl, we may need to reserve some sram space - for the bootrom. - The max spl loader size should be sram size minus reserved - size(if needed) - config SYS_MALLOC_F default y diff --git a/arch/arm/mach-rockchip/rk3036/Kconfig b/arch/arm/mach-rockchip/rk3036/Kconfig index 95fb2b9..0fbc58e 100644 --- a/arch/arm/mach-rockchip/rk3036/Kconfig +++ b/arch/arm/mach-rockchip/rk3036/Kconfig @@ -9,12 +9,6 @@ config SYS_SOC config SYS_MALLOC_F_LEN default 0x400 -config ROCKCHIP_SPL_HDR - default "RK30" - -config ROCKCHIP_MAX_SPL_SIZE - default 0x1000 - config ROCKCHIP_COMMON bool "Support rk common fuction" diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig index 3de3878..d0a7276 100644 --- a/arch/arm/mach-rockchip/rk3288/Kconfig +++ b/arch/arm/mach-rockchip/rk3288/Kconfig @@ -16,12 +16,6 @@ config TARGET_CHROMEBOOK_JERRY WiFi. It includes a Chrome OS EC (Cortex-M3) to provide access to the keyboard and battery functions. -config ROCKCHIP_SPL_HDR - default "RK32" - -config ROCKCHIP_MAX_SPL_SIZE - default 0x8000 - config SYS_SOC default "rockchip" diff --git a/tools/Makefile b/tools/Makefile index 117b07e..9082bda 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -64,7 +64,7 @@ RSA_OBJS-$(CONFIG_FIT_SIGNATURE) := $(addprefix lib/rsa/, \ rsa-sign.o rsa-verify.o rsa-checksum.o \ rsa-mod-exp.o) -ROCKCHIP_OBS = $(if $(CONFIG_ARCH_ROCKCHIP),lib/rc4.o rkcommon.o rkimage.o rksd.o,) +ROCKCHIP_OBS = lib/rc4.o rkcommon.o rkimage.o rksd.o # common objs for dumpimage and mkimage dumpimage-mkimage-objs := aisimage.o \ @@ -108,12 +108,6 @@ fit_check_sign-objs := $(dumpimage-mkimage-objs) fit_check_sign.o # TODO(sjg@chromium.org): Is this correct on Mac OS? -ifneq ($(CONFIG_ARCH_ROCKCHIP),) -HOST_EXTRACFLAGS += \ - -DCONFIG_ROCKCHIP_MAX_SPL_SIZE=$(CONFIG_ROCKCHIP_MAX_SPL_SIZE) \ - -DCONFIG_ROCKCHIP_SPL_HDR="\"$(CONFIG_ROCKCHIP_SPL_HDR)\"" -endif - ifneq ($(CONFIG_MX23)$(CONFIG_MX28),) # Add CONFIG_MXS into host CFLAGS, so we can check whether or not register # the mxsimage support within tools/mxsimage.c . diff --git a/tools/rkcommon.c b/tools/rkcommon.c index 249c862..9e2173f 100644 --- a/tools/rkcommon.c +++ b/tools/rkcommon.c @@ -49,7 +49,7 @@ int rkcommon_set_header(void *buf, uint file_size) { struct header0_info *hdr; - if (file_size > CONFIG_ROCKCHIP_MAX_SPL_SIZE) + if (file_size > RK_MAX_CODE1_SIZE) return -ENOSPC; memset(buf, '\0', RK_INIT_OFFSET * RK_BLK_SIZE); diff --git a/tools/rkimage.c b/tools/rkimage.c index 73634e3..7b292f4 100644 --- a/tools/rkimage.c +++ b/tools/rkimage.c @@ -30,7 +30,7 @@ static void rkimage_print_header(const void *buf) static void rkimage_set_header(void *buf, struct stat *sbuf, int ifd, struct image_tool_params *params) { - memcpy(buf, CONFIG_ROCKCHIP_SPL_HDR, 4); + memcpy(buf, "RK32", 4); } static int rkimage_extract_subimage(void *buf, struct image_tool_params *params) diff --git a/tools/rksd.c b/tools/rksd.c index f660d56..39f5c75 100644 --- a/tools/rksd.c +++ b/tools/rksd.c @@ -50,7 +50,7 @@ static void rksd_set_header(void *buf, struct stat *sbuf, int ifd, size); } - memcpy(buf + RKSD_SPL_HDR_START, CONFIG_ROCKCHIP_SPL_HDR, 4); + memcpy(buf + RKSD_SPL_HDR_START, "RK32", 4); } static int rksd_extract_subimage(void *buf, struct image_tool_params *params) @@ -72,7 +72,7 @@ static int rksd_vrec_header(struct image_tool_params *params, { int pad_size; - pad_size = RKSD_SPL_HDR_START + CONFIG_ROCKCHIP_MAX_SPL_SIZE; + pad_size = RKSD_SPL_HDR_START + RK_MAX_CODE1_SIZE; debug("pad_size %x\n", pad_size); return pad_size - params->file_size; diff --git a/tools/rkspi.c b/tools/rkspi.c index 69a12f0..eb8119b 100644 --- a/tools/rkspi.c +++ b/tools/rkspi.c @@ -53,7 +53,7 @@ static void rkspi_set_header(void *buf, struct stat *sbuf, int ifd, size); } - memcpy(buf + RKSPI_SPL_HDR_START, CONFIG_ROCKCHIP_SPL_HDR, 4); + memcpy(buf + RKSPI_SPL_HDR_START, "RK32", 4); /* * Spread the image out so we only use the first 2KB of each 4KB @@ -89,7 +89,7 @@ static int rkspi_vrec_header(struct image_tool_params *params, { int pad_size; - pad_size = (CONFIG_ROCKCHIP_MAX_SPL_SIZE + 0x7ff) / 0x800 * 0x800; + pad_size = (RK_MAX_CODE1_SIZE + 0x7ff) / 0x800 * 0x800; params->orig_file_size = pad_size; /* We will double the image size due to the SPI format */