From patchwork Sun Oct 18 21:13:28 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vadzim Dambrouski X-Patchwork-Id: 532048 X-Patchwork-Delegate: albert.aribaud@free.fr Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 053EC1402C4 for ; Mon, 19 Oct 2015 08:13:52 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=mbQvSqBI; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 109554B62C; Sun, 18 Oct 2015 23:13:49 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id rk6QzcTaA9Cv; Sun, 18 Oct 2015 23:13:48 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 58B294B624; Sun, 18 Oct 2015 23:13:48 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 691024B624 for ; Sun, 18 Oct 2015 23:13:46 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id w0D1AIg30CF9 for ; Sun, 18 Oct 2015 23:13:46 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-lf0-f65.google.com (mail-lf0-f65.google.com [209.85.215.65]) by theia.denx.de (Postfix) with ESMTPS id 217CC4B61D for ; Sun, 18 Oct 2015 23:13:43 +0200 (CEST) Received: by lffz202 with SMTP id z202so9593816lff.3 for ; Sun, 18 Oct 2015 14:13:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=WFVwCe5i0rY++0KSl/7EhFNM8T/ovBqhy5i2YDUKRK4=; b=mbQvSqBISJeQ6fsylRunm85NK3R+Kc12JCY5/Jv1VGW63rHJxz/ObTEfZM9uqaldpi vUWc0zHB5AnYxlknnH0g9jvx1KdTLrbmKxGxIoR2P8L/mKBpWua6CPyMmJKO5anNDxIF m+B+qRO/Kp/S868Vn26tPHFbRCQXBo16nasbcHosZfTby4bXlmBQYpnyPvg0rOIh5YvD 2chkOVJECgJB9DSw+70YGxLOkKLKQtPwKFbE6Bvq0+9+rNlI54zNxFRZUZI4ytZbS4YX SUExXbMU9GhzsdnyR1QTg46iXT1+4m6tbsFaH5dZNH9MIN2BjU0fGVBdjMVdA3pyYWQO jlHw== X-Received: by 10.25.15.83 with SMTP id e80mr6076732lfi.34.1445202822429; Sun, 18 Oct 2015 14:13:42 -0700 (PDT) Received: from inspiron.lan ([93.125.42.172]) by smtp.gmail.com with ESMTPSA id um10sm4696071lbc.15.2015.10.18.14.13.40 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 18 Oct 2015 14:13:41 -0700 (PDT) From: Vadzim Dambrouski To: u-boot@lists.denx.de Date: Mon, 19 Oct 2015 00:13:28 +0300 Message-Id: <1445202809-11711-1-git-send-email-pftbest@gmail.com> X-Mailer: git-send-email 2.6.1 Cc: Steve Rae , Tom Rini Subject: [U-Boot] [PATCH v2 1/2] arm: add support for semihosting for ARMv7M targets X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" It is possible to enable CONFIG_SEMIHOSTING for STM32F429 target, but it would result in compile error. This patch adds support for semihosting for STM32F429 or any other ARMv7M target. Tested on STM32F429-DISCOVERY board. Signed-off-by: Vadzim Dambrouski --- arch/arm/lib/semihosting.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c index c3e964e..ed5e8e4 100644 --- a/arch/arm/lib/semihosting.c +++ b/arch/arm/lib/semihosting.c @@ -31,6 +31,8 @@ static noinline long smh_trap(unsigned int sysnum, void *addr) register long result asm("r0"); #if defined(CONFIG_ARM64) asm volatile ("hlt #0xf000" : "=r" (result) : "0"(sysnum), "r"(addr)); +#elif defined(CONFIG_CPU_V7M) + asm volatile ("bkpt #0xAB" : "=r" (result) : "0"(sysnum), "r"(addr)); #else /* Note - untested placeholder */ asm volatile ("svc #0x123456" : "=r" (result) : "0"(sysnum), "r"(addr));