From patchwork Wed Oct 14 17:58:43 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Agner X-Patchwork-Id: 530322 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id BDEB8140DB1 for ; Thu, 15 Oct 2015 04:58:17 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; secure) header.d=agner.ch header.i=@agner.ch header.b=tzcNYzZ9; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AE3D94B663; Wed, 14 Oct 2015 19:58:15 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 4XAF9vVqDLcR; Wed, 14 Oct 2015 19:58:15 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 1219B4B62C; Wed, 14 Oct 2015 19:58:15 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 746AA4B62C for ; Wed, 14 Oct 2015 19:58:13 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id FfleBcBcH53p for ; Wed, 14 Oct 2015 19:58:13 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail.kmu-office.ch (mail.kmu-office.ch [178.209.48.109]) by theia.denx.de (Postfix) with ESMTPS id 418864B622 for ; Wed, 14 Oct 2015 19:58:09 +0200 (CEST) Received: from trochilidae.toradex.int (75-146-58-181-Washington.hfc.comcastbusiness.net [75.146.58.181]) by mail.kmu-office.ch (Postfix) with ESMTPSA id C723B5C23AF; Wed, 14 Oct 2015 19:56:26 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=agner.ch; s=dkim; t=1444845388; bh=CCHdOXVAU/VSItK41r3QwhEAMEghXJSXFJ0gIh0CjXg=; h=From:To:Cc:Subject:Date:From; b=tzcNYzZ9uvT+1B/pK6YL+Ywwg/DGMgz9QDrJfcqzCNeJKK3sGAL7f76ocoOXHPfLR HkNP6ZIRJ5PRcTtaKMgvqGyVKax9svqcqgxoLs0zLWe3pP6u+BPzVbzWvjtHhrEAXX zlZJiHRL3V6kJTsWMEmMgYNbu4e4NIv4t7H17XMc= From: Stefan Agner To: u-boot@lists.denx.de, trini@konsulko.com, b18965@freescale.com Date: Wed, 14 Oct 2015 10:58:43 -0700 Message-Id: <1444845523-19243-1-git-send-email-stefan@agner.ch> X-Mailer: git-send-email 2.6.1 Cc: otavio.salvador@ossystems.com.br Subject: [U-Boot] [PATCH v2] arm: vf610twr: improve memory layout X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Currently, the device tree relocation is disabled, likely to keep some DDR3 RAM at the end for Cortex-M4 firmwares. This can be archived using bootm_size, which limits the image processing range of the boot commands. Move the device tree standard load address to a higher address which aligns better with what we are doing on other boards. Signed-off-by: Stefan Agner Acked-by: Otavio Salvador --- So this is the second version of the patch "arm: vf610: move device tree after kernel image" which makes use of bootm_size. I also added an appropriate comment, added variables for RAM disk, and added kernel_addr_r/fdt_addr_r. -- Stefan include/configs/vf610twr.h | 27 +++++++++++++++++++++------ 1 file changed, 21 insertions(+), 6 deletions(-) diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h index 324ba8f..7f4260a 100644 --- a/include/configs/vf610twr.h +++ b/include/configs/vf610twr.h @@ -116,20 +116,37 @@ #define CONFIG_BOOTDELAY 3 -#define CONFIG_LOADADDR 0x82000000 +#define CONFIG_SYS_LOAD_ADDR 0x82000000 /* We boot from the gfxRAM area of the OCRAM. */ #define CONFIG_SYS_TEXT_BASE 0x3f408000 #define CONFIG_BOARD_SIZE_LIMIT 524288 +/* + * We do have 128MB of memory on the Vybrid Tower board. Leave the last + * 16MB alone to avoid conflicts with Cortex-M4 firmwares running from + * DDR3. Hence, limit the memory range for image processing to 112MB + * using bootm_size. All of the following must be within this range. + * We have the default load at 32MB into DDR (for the kernel), FDT at + * 64MB and the ramdisk 512KB above that (allowing for hopefully never + * seen large trees). This allows a reasonable split between ramdisk + * and kernel size, where the ram disk can be a bit larger. + */ +#define MEM_LAYOUT_ENV_SETTINGS \ + "bootm_size=0x07000000\0" \ + "loadaddr=0x82000000\0" \ + "kernel_addr_r=0x82000000\0" \ + "fdt_addr=0x84000000\0" \ + "fdt_addr_r=0x84000000\0" \ + "rdaddr=0x84080000\0" \ + "ramdisk_addr_r=0x84080000\0" + #define CONFIG_EXTRA_ENV_SETTINGS \ + MEM_LAYOUT_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ "console=ttyLP1\0" \ - "fdt_high=0xffffffff\0" \ - "initrd_high=0xffffffff\0" \ "fdt_file=vf610-twr.dtb\0" \ - "fdt_addr=0x81000000\0" \ "boot_fdt=try\0" \ "ip_dyn=yes\0" \ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ @@ -224,8 +241,6 @@ #define CONFIG_SYS_MEMTEST_START 0x80010000 #define CONFIG_SYS_MEMTEST_END 0x87C00000 -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR - /* * Stack sizes * The stack sizes are set up in start.S using the settings below