From patchwork Fri Oct 9 11:31:02 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Chou X-Patchwork-Id: 528184 X-Patchwork-Delegate: thomas@wytron.com.tw Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 407F71402B4 for ; Fri, 9 Oct 2015 22:31:18 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D05A74B8B1; Fri, 9 Oct 2015 13:31:15 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id pknuvwCxorbu; Fri, 9 Oct 2015 13:31:15 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4D4E74B8A6; Fri, 9 Oct 2015 13:31:15 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 87DB64B8A6 for ; Fri, 9 Oct 2015 13:31:11 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id XV4LQiKeK8Xc for ; Fri, 9 Oct 2015 13:31:11 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from www.wytron.com.tw (220-134-43-68.HINET-IP.hinet.net [220.134.43.68]) by theia.denx.de (Postfix) with ESMTP id 12F5C4B8A5 for ; Fri, 9 Oct 2015 13:31:07 +0200 (CEST) Received: from localhost.localdomain (unknown [192.168.1.250]) by www.wytron.com.tw (Postfix) with ESMTP id 470EAD00228; Fri, 9 Oct 2015 19:31:04 +0800 (CST) From: Thomas Chou To: u-boot@lists.denx.de Date: Fri, 9 Oct 2015 19:31:02 +0800 Message-Id: <1444390262-15804-1-git-send-email-thomas@wytron.com.tw> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1444013823-11909-1-git-send-email-thomas@wytron.com.tw> References: <1444013823-11909-1-git-send-email-thomas@wytron.com.tw> Cc: Marek Vasut , clsee@altera.com, lftan@altera.com Subject: [U-Boot] [PATCH v3] nios2: convert dma_alloc_coherent to use memalign X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Convert dma_alloc_coherent to use memalign. Signed-off-by: Thomas Chou --- v2 use memalign. v3 check memalign() return for out of memory. arch/nios2/include/asm/dma-mapping.h | 23 ++++++++++------------- 1 file changed, 10 insertions(+), 13 deletions(-) diff --git a/arch/nios2/include/asm/dma-mapping.h b/arch/nios2/include/asm/dma-mapping.h index 1350e3b..0618dc2 100644 --- a/arch/nios2/include/asm/dma-mapping.h +++ b/arch/nios2/include/asm/dma-mapping.h @@ -1,23 +1,20 @@ #ifndef __ASM_NIOS2_DMA_MAPPING_H #define __ASM_NIOS2_DMA_MAPPING_H -/* dma_alloc_coherent() return cache-line aligned allocation which is mapped +#include + +/* + * dma_alloc_coherent() return cache-line aligned allocation which is mapped * to uncached io region. - * - * IO_REGION_BASE should be defined in board config header file - * 0x80000000 for nommu, 0xe0000000 for mmu */ - static inline void *dma_alloc_coherent(size_t len, unsigned long *handle) { - void *addr = malloc(len + CONFIG_SYS_DCACHELINE_SIZE); - if (!addr) - return 0; - flush_dcache((unsigned long)addr, len + CONFIG_SYS_DCACHELINE_SIZE); - *handle = ((unsigned long)addr + - (CONFIG_SYS_DCACHELINE_SIZE - 1)) & - ~(CONFIG_SYS_DCACHELINE_SIZE - 1) & ~(IO_REGION_BASE); - return (void *)(*handle | IO_REGION_BASE); + *handle = (unsigned long)memalign(ARCH_DMA_MINALIGN, len); + if (!*handle) + return NULL; + flush_dcache_range(*handle, *handle + len); + + return ioremap(*handle, len); } #endif /* __ASM_NIOS2_DMA_MAPPING_H */