From patchwork Thu Oct 1 07:36:03 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 524836 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id E9D1A140B0D for ; Thu, 1 Oct 2015 17:34:38 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=Q0mhnzTn; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 706004B8D0; Thu, 1 Oct 2015 09:34:20 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 03uK0cHqZ3lh; Thu, 1 Oct 2015 09:34:20 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E3A754B93F; Thu, 1 Oct 2015 09:34:04 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 008C34B8B7 for ; Thu, 1 Oct 2015 09:33:51 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 9HEWfSsL-d-h for ; Thu, 1 Oct 2015 09:33:50 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pa0-f46.google.com (mail-pa0-f46.google.com [209.85.220.46]) by theia.denx.de (Postfix) with ESMTPS id 77FE94B8A6 for ; Thu, 1 Oct 2015 09:33:45 +0200 (CEST) Received: by padhy16 with SMTP id hy16so66546859pad.1 for ; Thu, 01 Oct 2015 00:33:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:subject:date:message-id:in-reply-to:references; bh=x1n6cNJzmk5YvbFBRVg10+bOuG0P+2s6pPMaxBI+gsY=; b=Q0mhnzTnKbN8YJ/bvM2jYIKUotWoLRmhldJniz2Wt7fTGoQ9B+NOpg8RlrPeQjXta/ U5xgpRS10yxuDpSH4LJQA93BJppfgoibieFXTkN7tOZJxxMEpysN0Mv/oYCGytJQXxMf 7TD9Km3+OSsB3IDsTl3fFdVTBcj2njjkyNx7ouf/B3U15NxZ0bxuutlMI/WbLnzHDfkN e4mWKJrzHPhlJVbWXFpvMJeQThzPeAGAFTqio1bcz3r2yKV7CMQr05+pWSCWtcBbShiO ZyXdlnruDxY9nqAEveVRZKpZAPVRwvQMMfPlFxlDQu/Ch4esUoqgyS7382T40130SY/d grPA== X-Received: by 10.68.57.175 with SMTP id j15mr10334237pbq.34.1443684824685; Thu, 01 Oct 2015 00:33:44 -0700 (PDT) Received: from ala-d2121-lx1.wrs.com (unknown-157-139.windriver.com. [147.11.157.139]) by smtp.gmail.com with ESMTPSA id rw8sm4776181pac.11.2015.10.01.00.33.43 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 01 Oct 2015 00:33:44 -0700 (PDT) From: Bin Meng To: Simon Glass , U-Boot Mailing List Date: Thu, 1 Oct 2015 00:36:03 -0700 Message-Id: <1443684964-342-6-git-send-email-bmeng.cn@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1443684964-342-1-git-send-email-bmeng.cn@gmail.com> References: <1443684964-342-1-git-send-email-bmeng.cn@gmail.com> Subject: [U-Boot] [PATCH 5/6] x86: ivybridge: Remove the dead codes that programs pci bridge X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Remove bd82x6x_pci_bus_enable_resources() that is not called anywhere. Signed-off-by: Bin Meng Acked-by: Simon Glass --- arch/x86/cpu/ivybridge/bd82x6x.c | 32 -------------------------------- 1 file changed, 32 deletions(-) diff --git a/arch/x86/cpu/ivybridge/bd82x6x.c b/arch/x86/cpu/ivybridge/bd82x6x.c index ca8cccf..3e7a907 100644 --- a/arch/x86/cpu/ivybridge/bd82x6x.c +++ b/arch/x86/cpu/ivybridge/bd82x6x.c @@ -55,38 +55,6 @@ void bd82x6x_pci_init(pci_dev_t dev) x86_pci_write_config16(dev, SECSTS, reg16); } -#define PCI_BRIDGE_UPDATE_COMMAND -void bd82x6x_pci_dev_enable_resources(pci_dev_t dev) -{ - uint16_t command; - - command = x86_pci_read_config16(dev, PCI_COMMAND); - command |= PCI_COMMAND_IO; -#ifdef PCI_BRIDGE_UPDATE_COMMAND - /* - * If we write to PCI_COMMAND, on some systems this will cause the - * ROM and APICs to become invisible. - */ - debug("%x cmd <- %02x\n", dev, command); - x86_pci_write_config16(dev, PCI_COMMAND, command); -#else - printf("%s cmd <- %02x (NOT WRITTEN!)\n", dev_path(dev), command); -#endif -} - -void bd82x6x_pci_bus_enable_resources(pci_dev_t dev) -{ - uint16_t ctrl; - - ctrl = x86_pci_read_config16(dev, PCI_BRIDGE_CONTROL); - ctrl |= PCI_COMMAND_IO; - ctrl |= PCI_BRIDGE_CTL_VGA; - debug("%x bridge ctrl <- %04x\n", dev, ctrl); - x86_pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl); - - bd82x6x_pci_dev_enable_resources(dev); -} - static int bd82x6x_probe(struct udevice *dev) { const void *blob = gd->fdt_blob;