From patchwork Sun Sep 20 11:41:47 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Chou X-Patchwork-Id: 519985 X-Patchwork-Delegate: thomas@wytron.com.tw Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 682F1140180 for ; Sun, 20 Sep 2015 21:42:25 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AA1A24B9B9; Sun, 20 Sep 2015 13:42:23 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id OPWL5suNI-PJ; Sun, 20 Sep 2015 13:42:23 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2C1864B943; Sun, 20 Sep 2015 13:42:23 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 699204B943 for ; Sun, 20 Sep 2015 13:42:18 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id GAZpLuaPL8of for ; Sun, 20 Sep 2015 13:42:18 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from www.wytron.com.tw (220-134-43-68.HINET-IP.hinet.net [220.134.43.68]) by theia.denx.de (Postfix) with ESMTP id A003E4B930 for ; Sun, 20 Sep 2015 13:42:13 +0200 (CEST) Received: from localhost.localdomain (unknown [192.168.1.250]) by www.wytron.com.tw (Postfix) with ESMTP id 7F578D00302; Sun, 20 Sep 2015 19:42:10 +0800 (CST) From: Thomas Chou To: u-boot@lists.denx.de Date: Sun, 20 Sep 2015 19:41:47 +0800 Message-Id: <1442749307-21282-1-git-send-email-thomas@wytron.com.tw> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1442546658-26012-1-git-send-email-thomas@wytron.com.tw> References: <1442546658-26012-1-git-send-email-thomas@wytron.com.tw> Cc: Marek Vasut , clsee@altera.com, lftan@altera.com Subject: [U-Boot] [PATCH v3] nios2: convert altera_uart to driver model X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Convert altera_uart to driver model. Signed-off-by: Thomas Chou Reviewed-by: Simon Glass Acked-by: Marek Vasut --- v2 fix coding style as Marek suggested. v3 add early debug uart. fix coding style as Simon suggested. arch/nios2/dts/3c120_devboard.dts | 1 + drivers/serial/Kconfig | 14 +++ drivers/serial/altera_uart.c | 198 ++++++++++++++++++++------------------ include/configs/nios2-generic.h | 9 +- 4 files changed, 123 insertions(+), 99 deletions(-) diff --git a/arch/nios2/dts/3c120_devboard.dts b/arch/nios2/dts/3c120_devboard.dts index 07bec69..a35f5fe 100644 --- a/arch/nios2/dts/3c120_devboard.dts +++ b/arch/nios2/dts/3c120_devboard.dts @@ -130,6 +130,7 @@ interrupts = <10>; current-speed = <115200>; clock-frequency = <62500000>; + u-boot,dm-pre-reloc; }; }; diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 10505dc..0282883 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -61,6 +61,13 @@ config DEBUG_UART_ALTERA_JTAGUART You will need to provide parameters to make this work. The driver will be available until the real driver model serial is running. +config DEBUG_UART_ALTERA_UART + bool "Altera UART" + help + Select this to enable a debug UART using the altera_uart driver. + You will need to provide parameters to make this work. The driver will + be available until the real driver model serial is running. + config DEBUG_UART_NS16550 bool "ns16550" help @@ -135,6 +142,13 @@ config ALTERA_JTAG_UART_BYPASS output will wait forever until a JTAG terminal is connected. If you not are sure, say Y. +config ALTERA_UART + bool "Altera UART support" + depends on DM_SERIAL + help + Select this to enable an UART for Altera devices. Please find + details on the "Embedded Peripherals IP User Guide" of Altera. + config ROCKCHIP_SERIAL bool "Rockchip on-chip UART support" depends on ARCH_UNIPHIER && DM_SERIAL diff --git a/drivers/serial/altera_uart.c b/drivers/serial/altera_uart.c index d6b1484..4ff9fe2 100644 --- a/drivers/serial/altera_uart.c +++ b/drivers/serial/altera_uart.c @@ -5,133 +5,149 @@ * SPDX-License-Identifier: GPL-2.0+ */ - #include -#include +#include +#include #include #include #include -typedef volatile struct { - unsigned rxdata; /* Rx data reg */ - unsigned txdata; /* Tx data reg */ - unsigned status; /* Status reg */ - unsigned control; /* Control reg */ - unsigned divisor; /* Baud rate divisor reg */ - unsigned endofpacket; /* End-of-packet reg */ -} nios_uart_t; +struct altera_uart_regs { + u32 rxdata; /* Rx data reg */ + u32 txdata; /* Tx data reg */ + u32 status; /* Status reg */ + u32 control; /* Control reg */ + u32 divisor; /* Baud rate divisor reg */ + u32 endofpacket; /* End-of-packet reg */ +}; + +struct altera_uart_platdata { + struct altera_uart_regs *regs; + unsigned int uartclk; +}; /* status register */ -#define NIOS_UART_PE (1 << 0) /* parity error */ -#define NIOS_UART_FE (1 << 1) /* frame error */ -#define NIOS_UART_BRK (1 << 2) /* break detect */ -#define NIOS_UART_ROE (1 << 3) /* rx overrun */ -#define NIOS_UART_TOE (1 << 4) /* tx overrun */ -#define NIOS_UART_TMT (1 << 5) /* tx empty */ -#define NIOS_UART_TRDY (1 << 6) /* tx ready */ -#define NIOS_UART_RRDY (1 << 7) /* rx ready */ -#define NIOS_UART_E (1 << 8) /* exception */ -#define NIOS_UART_DCTS (1 << 10) /* cts change */ -#define NIOS_UART_CTS (1 << 11) /* cts */ -#define NIOS_UART_EOP (1 << 12) /* eop detected */ - -/* control register */ -#define NIOS_UART_IPE (1 << 0) /* parity error int ena*/ -#define NIOS_UART_IFE (1 << 1) /* frame error int ena */ -#define NIOS_UART_IBRK (1 << 2) /* break detect int ena */ -#define NIOS_UART_IROE (1 << 3) /* rx overrun int ena */ -#define NIOS_UART_ITOE (1 << 4) /* tx overrun int ena */ -#define NIOS_UART_ITMT (1 << 5) /* tx empty int ena */ -#define NIOS_UART_ITRDY (1 << 6) /* tx ready int ena */ -#define NIOS_UART_IRRDY (1 << 7) /* rx ready int ena */ -#define NIOS_UART_IE (1 << 8) /* exception int ena */ -#define NIOS_UART_TBRK (1 << 9) /* transmit break */ -#define NIOS_UART_IDCTS (1 << 10) /* cts change int ena */ -#define NIOS_UART_RTS (1 << 11) /* rts */ -#define NIOS_UART_IEOP (1 << 12) /* eop detected int ena */ +#define ALTERA_UART_TMT (1 << 5) /* tx empty */ +#define ALTERA_UART_TRDY (1 << 6) /* tx ready */ +#define ALTERA_UART_RRDY (1 << 7) /* rx ready */ DECLARE_GLOBAL_DATA_PTR; -/*------------------------------------------------------------------ - * UART the serial port - *-----------------------------------------------------------------*/ - -static nios_uart_t *uart = (nios_uart_t *) CONFIG_SYS_NIOS_CONSOLE; +static int altera_uart_setbrg(struct udevice *dev, int baudrate) +{ + struct altera_uart_platdata *plat = dev->platdata; + struct altera_uart_regs *const regs = plat->regs; + u32 div; -#if defined(CONFIG_SYS_NIOS_FIXEDBAUD) + div = (plat->uartclk / baudrate) - 1; + writel(div, ®s->divisor); -/* - * Everything's already setup for fixed-baud PTF - * assignment - */ -static void altera_serial_setbrg(void) -{ + return 0; } -static int altera_serial_init(void) +static int altera_uart_putc(struct udevice *dev, const char ch) { - return 0; -} + struct altera_uart_platdata *plat = dev->platdata; + struct altera_uart_regs *const regs = plat->regs; -#else + if (!(readl(®s->status) & ALTERA_UART_TRDY)) + return -EAGAIN; -static void altera_serial_setbrg(void) -{ - unsigned div; + writel(ch, ®s->txdata); - div = (CONFIG_SYS_CLK_FREQ/gd->baudrate)-1; - writel (div, &uart->divisor); + return 0; } -static int altera_serial_init(void) +static int altera_uart_pending(struct udevice *dev, bool input) { - serial_setbrg(); - return 0; + struct altera_uart_platdata *plat = dev->platdata; + struct altera_uart_regs *const regs = plat->regs; + u32 st = readl(®s->status); + + if (input) + return st & ALTERA_UART_RRDY ? 1 : 0; + else + return !(st & ALTERA_UART_TMT); } -#endif /* CONFIG_SYS_NIOS_FIXEDBAUD */ - -/*----------------------------------------------------------------------- - * UART CONSOLE - *---------------------------------------------------------------------*/ -static void altera_serial_putc(char c) +static int altera_uart_getc(struct udevice *dev) { - if (c == '\n') - serial_putc ('\r'); - while ((readl (&uart->status) & NIOS_UART_TRDY) == 0) - WATCHDOG_RESET (); - writel ((unsigned char)c, &uart->txdata); + struct altera_uart_platdata *plat = dev->platdata; + struct altera_uart_regs *const regs = plat->regs; + + if (!(readl(®s->status) & ALTERA_UART_RRDY)) + return -EAGAIN; + + return readl(®s->rxdata) & 0xff; } -static int altera_serial_tstc(void) +static int altera_uart_probe(struct udevice *dev) { - return (readl (&uart->status) & NIOS_UART_RRDY); + return 0; } -static int altera_serial_getc(void) +static int altera_uart_ofdata_to_platdata(struct udevice *dev) { - while (serial_tstc () == 0) - WATCHDOG_RESET (); - return (readl (&uart->rxdata) & 0x00ff ); + struct altera_uart_platdata *plat = dev_get_platdata(dev); + + plat->regs = ioremap(dev_get_addr(dev), + sizeof(struct altera_uart_regs)); + plat->uartclk = fdtdec_get_int(gd->fdt_blob, dev->of_offset, + "clock-frequency", 0); + + return 0; } -static struct serial_device altera_serial_drv = { - .name = "altera_serial", - .start = altera_serial_init, - .stop = NULL, - .setbrg = altera_serial_setbrg, - .putc = altera_serial_putc, - .puts = default_serial_puts, - .getc = altera_serial_getc, - .tstc = altera_serial_tstc, +static const struct dm_serial_ops altera_uart_ops = { + .putc = altera_uart_putc, + .pending = altera_uart_pending, + .getc = altera_uart_getc, + .setbrg = altera_uart_setbrg, +}; + +static const struct udevice_id altera_uart_ids[] = { + { .compatible = "altr,uart-1.0", }, + { } +}; + +U_BOOT_DRIVER(altera_uart) = { + .name = "altera_uart", + .id = UCLASS_SERIAL, + .of_match = altera_uart_ids, + .ofdata_to_platdata = altera_uart_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct altera_uart_platdata), + .probe = altera_uart_probe, + .ops = &altera_uart_ops, + .flags = DM_FLAG_PRE_RELOC, }; -void altera_serial_initialize(void) +#ifdef CONFIG_DEBUG_UART_ALTERA_UART + +#include + +void debug_uart_init(void) { - serial_register(&altera_serial_drv); + struct altera_uart_regs *regs = (void *)CONFIG_DEBUG_UART_BASE; + u32 div; + + div = (CONFIG_DEBUG_UART_CLOCK / CONFIG_BAUDRATE) - 1; + writel(div, ®s->divisor); } -__weak struct serial_device *default_serial_console(void) +static inline void _debug_uart_putc(int ch) { - return &altera_serial_drv; + struct altera_uart_regs *regs = (void *)CONFIG_DEBUG_UART_BASE; + + while (1) { + u32 st = readl(®s->status); + + if (st & ALTERA_UART_TRDY) + break; + } + + writel(ch, ®s->txdata); } + +DEBUG_UART_FUNCS + +#endif diff --git a/include/configs/nios2-generic.h b/include/configs/nios2-generic.h index bd6d45c..dcb90de 100644 --- a/include/configs/nios2-generic.h +++ b/include/configs/nios2-generic.h @@ -23,14 +23,7 @@ /* * SERIAL */ -#if defined(CONFIG_ALTERA_JTAG_UART) -#else -# define CONFIG_SYS_NIOS_CONSOLE CONFIG_SYS_UART_BASE -#endif - -#define CONFIG_SYS_NIOS_FIXEDBAUD -#define CONFIG_BAUDRATE CONFIG_SYS_UART_BAUD -#define CONFIG_SYS_BAUDRATE_TABLE {CONFIG_BAUDRATE} +#define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_CONSOLE_INFO_QUIET /* Suppress console info */ /*