From patchwork Mon Sep 7 11:43:52 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_Bie=C3=9Fmann?= X-Patchwork-Id: 515133 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 0210C1401CB for ; Mon, 7 Sep 2015 22:49:03 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=googlemail.com header.i=@googlemail.com header.b=FWOCfiiZ; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3ACD94B7B2; Mon, 7 Sep 2015 14:48:37 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id dfd2iJ_nBnVr; Mon, 7 Sep 2015 14:48:37 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3793E4B7BB; Mon, 7 Sep 2015 14:48:15 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7547A4B69E for ; Mon, 7 Sep 2015 13:44:05 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id CbMjF1KdEows for ; Mon, 7 Sep 2015 13:44:05 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-wi0-f180.google.com (mail-wi0-f180.google.com [209.85.212.180]) by theia.denx.de (Postfix) with ESMTPS id 383594B686 for ; Mon, 7 Sep 2015 13:44:01 +0200 (CEST) Received: by wiclk2 with SMTP id lk2so85865482wic.0 for ; Mon, 07 Sep 2015 04:44:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type:content-transfer-encoding; bh=HMhRXaUvYX1jK5LWBZigpzzhrfEykdjJXnuQ+odvHv4=; b=FWOCfiiZCGzu6p/bTLskVxNu9g8dDpCrvHthxaGGdY3h/CazIZfeKFBHt5UXKMcFxv nKeVAxiFwRe4wWLFf6xHYtTyT0T9m4zVKGIdORd1R2pfoENFQhJV3VMmChu0WeP7fvkG e05mP03c/tFGg7jlsNYqBP5d26cff5AZMidU5VyPwYQi6FZiezxA2rDQWuFTUrkoJA1K PJHQO66dWNRpyEbceCWyqWaDuUZ2R4Sg0iznHa2KN5jirVE768dFTNlZHeqPb3z+oDqL cznYjFPZnm9FvvUSEZLsErLYiQgNyHcutHz4bTrMUcdMStP39ZxnJfso2Xp8g5GsfN82 Iftw== X-Received: by 10.194.238.39 with SMTP id vh7mr33649803wjc.109.1441626241237; Mon, 07 Sep 2015 04:44:01 -0700 (PDT) Received: from localhost ([2a01:198:47b:1::12]) by smtp.gmail.com with ESMTPSA id aw1sm10940184wjc.26.2015.09.07.04.44.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 07 Sep 2015 04:44:00 -0700 (PDT) From: =?UTF-8?q?Andreas=20Bie=C3=9Fmann?= To: U-Boot ML Date: Mon, 7 Sep 2015 13:43:52 +0200 Message-Id: <1441626234-16364-1-git-send-email-andreas.devel@googlemail.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1440176519-30102-2-git-send-email-hs@denx.de> References: <1440176519-30102-2-git-send-email-hs@denx.de> MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 07 Sep 2015 14:47:54 +0200 Cc: Stuart Yoder , Jagan Teki , Stefan Roese , Marek Vasut , Tom Rini , Stephen Warren , James Doublesin , Michal Simek , Kishon Vijay Abraham I , Scott Wood , Andrea Scian , Hao Zhang , "J. German Rivera" , Masahiro Yamada , Tom Warren , Steve Kipisz , "Ivan\"" , York Sun Subject: [U-Boot] [PATCH v5] bitops: introduce BIT() definition X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Heiko Schocher introduce BIT() definition, used in at91_udc gadget driver. Signed-off-by: Heiko Schocher [remove all other occurrences of BIT(x) definition] Signed-off-by: Andreas Bießmann Acked-by: Stefan Roese Acked-by: Anatolij Gustschin --- Full buildman is running Would be nice to get some Acked-by/Reviewed-by since this is a fixup of one patch in a series that should go into 2015.10. Andreas Changes in v5: - remove other definitions of BIT() Changes in v3: - new in this version arch/arm/include/asm/arch-am33xx/cpu.h | 1 - arch/arm/include/asm/arch-hi6220/gpio.h | 2 -- arch/arm/include/asm/arch-omap5/cpu.h | 2 -- arch/arm/include/asm/arch-tegra/dc.h | 2 -- arch/arm/mach-davinci/cpu.c | 2 -- arch/arm/mach-keystone/include/mach/clock_defs.h | 2 -- arch/arm/mach-keystone/include/mach/hardware.h | 2 -- arch/arm/mach-mvebu/include/mach/soc.h | 2 -- arch/arm/mach-zynq/include/mach/gpio.h | 2 -- drivers/ddr/marvell/a38x/ddr3_init.h | 2 -- drivers/mtd/nand/jz4740_nand.c | 1 - drivers/spi/davinci_spi.c | 2 -- drivers/spi/ep93xx_spi.c | 2 -- drivers/video/anx9804.c | 2 -- include/fsl-mc/fsl_mc.h | 1 - include/linux/bitops.h | 2 ++ 16 files changed, 2 insertions(+), 27 deletions(-) diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h index 13a9cad..112ac5e 100644 --- a/arch/arm/include/asm/arch-am33xx/cpu.h +++ b/arch/arm/include/asm/arch-am33xx/cpu.h @@ -17,7 +17,6 @@ #include -#define BIT(x) (1 << x) #define CL_BIT(x) (0 << x) /* Timer register bits */ diff --git a/arch/arm/include/asm/arch-hi6220/gpio.h b/arch/arm/include/asm/arch-hi6220/gpio.h index 98122a2..4fafaef 100644 --- a/arch/arm/include/asm/arch-hi6220/gpio.h +++ b/arch/arm/include/asm/arch-hi6220/gpio.h @@ -11,8 +11,6 @@ #define HI6220_GPIO_BASE(bank) (((bank < 4) ? 0xf8011000 : \ 0xf7020000 - 0x4000) + (0x1000 * bank)) -#define BIT(x) (1 << (x)) - #define HI6220_GPIO_PER_BANK 8 #define HI6220_GPIO_DIR 0x400 diff --git a/arch/arm/include/asm/arch-omap5/cpu.h b/arch/arm/include/asm/arch-omap5/cpu.h index 6109b92..b1513e9 100644 --- a/arch/arm/include/asm/arch-omap5/cpu.h +++ b/arch/arm/include/asm/arch-omap5/cpu.h @@ -56,8 +56,6 @@ struct watchdog { #endif /* __ASSEMBLY__ */ #endif /* __KERNEL_STRICT_NAMES */ -#define BIT(x) (1 << (x)) - #define WD_UNLOCK1 0xAAAA #define WD_UNLOCK2 0x5555 diff --git a/arch/arm/include/asm/arch-tegra/dc.h b/arch/arm/include/asm/arch-tegra/dc.h index 6ffb468..3a87f0b 100644 --- a/arch/arm/include/asm/arch-tegra/dc.h +++ b/arch/arm/include/asm/arch-tegra/dc.h @@ -364,8 +364,6 @@ struct dc_ctlr { struct dc_winbuf_reg winbuf; /* WINBUF A/B/C 0x800 ~ 0x80d */ }; -#define BIT(pos) (1U << pos) - /* DC_CMD_DISPLAY_COMMAND 0x032 */ #define CTRL_MODE_SHIFT 5 #define CTRL_MODE_MASK (0x3 << CTRL_MODE_SHIFT) diff --git a/arch/arm/mach-davinci/cpu.c b/arch/arm/mach-davinci/cpu.c index ff61147..74c3d5d 100644 --- a/arch/arm/mach-davinci/cpu.c +++ b/arch/arm/mach-davinci/cpu.c @@ -28,8 +28,6 @@ DECLARE_GLOBAL_DATA_PTR; #define PLLC_PLLDIV8 0x170 #define PLLC_PLLDIV9 0x174 -#define BIT(x) (1 << (x)) - /* SOC-specific pll info */ #ifdef CONFIG_SOC_DM355 #define ARM_PLLDIV PLLC_PLLDIV1 diff --git a/arch/arm/mach-keystone/include/mach/clock_defs.h b/arch/arm/mach-keystone/include/mach/clock_defs.h index 8ad371f..f8d61d6 100644 --- a/arch/arm/mach-keystone/include/mach/clock_defs.h +++ b/arch/arm/mach-keystone/include/mach/clock_defs.h @@ -11,8 +11,6 @@ #include -#define BIT(x) (1 << (x)) - /* PLL Control Registers */ struct pllctl_regs { u32 ctl; /* 00 */ diff --git a/arch/arm/mach-keystone/include/mach/hardware.h b/arch/arm/mach-keystone/include/mach/hardware.h index 53f28ec..f98a24e 100644 --- a/arch/arm/mach-keystone/include/mach/hardware.h +++ b/arch/arm/mach-keystone/include/mach/hardware.h @@ -24,8 +24,6 @@ typedef volatile unsigned int *dv_reg_p; #endif -#define BIT(x) (1 << (x)) - #define KS2_DDRPHY_PIR_OFFSET 0x04 #define KS2_DDRPHY_PGCR0_OFFSET 0x08 #define KS2_DDRPHY_PGCR1_OFFSET 0x0C diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h index a8a6b27..02c21bc 100644 --- a/arch/arm/mach-mvebu/include/mach/soc.h +++ b/arch/arm/mach-mvebu/include/mach/soc.h @@ -11,8 +11,6 @@ #ifndef _MVEBU_SOC_H #define _MVEBU_SOC_H -#define BIT(x) (1 << (x)) - #define SOC_MV78460_ID 0x7846 #define SOC_88F6810_ID 0x6810 #define SOC_88F6820_ID 0x6820 diff --git a/arch/arm/mach-zynq/include/mach/gpio.h b/arch/arm/mach-zynq/include/mach/gpio.h index 9e1e7da..0789c49 100644 --- a/arch/arm/mach-zynq/include/mach/gpio.h +++ b/arch/arm/mach-zynq/include/mach/gpio.h @@ -71,6 +71,4 @@ /* GPIO upper 16 bit mask */ #define ZYNQ_GPIO_UPPER_MASK 0xFFFF0000 -#define BIT(x) (1< #include -#define BIT(x) (1 << (x)) - /* SPIGCR0 */ #define SPIGCR0_SPIENA_MASK 0x1 #define SPIGCR0_SPIRST_MASK 0x0 diff --git a/drivers/spi/ep93xx_spi.c b/drivers/spi/ep93xx_spi.c index 235557e..cb682dd 100644 --- a/drivers/spi/ep93xx_spi.c +++ b/drivers/spi/ep93xx_spi.c @@ -16,8 +16,6 @@ #include - -#define BIT(x) (1<<(x)) #define SSPBASE SPI_BASE #define SSPCR0 0x0000 diff --git a/drivers/video/anx9804.c b/drivers/video/anx9804.c index 83d60d6..37ad69a 100755 --- a/drivers/video/anx9804.c +++ b/drivers/video/anx9804.c @@ -14,8 +14,6 @@ #include #include "anx9804.h" -#define BIT(x) (1 << (x)) - /* Registers at i2c address 0x38 */ #define ANX9804_HDCP_CONTROL_0_REG 0x01 diff --git a/include/fsl-mc/fsl_mc.h b/include/fsl-mc/fsl_mc.h index 9106f25..9517a4a 100644 --- a/include/fsl-mc/fsl_mc.h +++ b/include/fsl-mc/fsl_mc.h @@ -12,7 +12,6 @@ #define MC_CCSR_BASE_ADDR \ ((struct mc_ccsr_registers __iomem *)0x8340000) -#define BIT(x) (1 << (x)) #define GCR1_P1_STOP BIT(31) #define GCR1_P2_STOP BIT(30) #define GCR1_P1_DE_RST BIT(23) diff --git a/include/linux/bitops.h b/include/linux/bitops.h index e724310..7d30ace 100644 --- a/include/linux/bitops.h +++ b/include/linux/bitops.h @@ -3,6 +3,8 @@ #include +#define BIT(nr) (1UL << (nr)) + /* * ffs: find first bit set. This is defined the same way as * the libc and compiler builtin ffs routines, therefore