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[U-Boot,4/4] arm: dts: socfpga: Increase the spi-max-frequency for QSPI flash

Message ID 1441287722-2250-4-git-send-email-clsee@altera.com
State Superseded
Delegated to: Marek Vasut
Headers show

Commit Message

Chin Liang See Sept. 3, 2015, 1:42 p.m. UTC 
With a working QSPI calibration, the SCLK can now run up to 100MHz

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vikas Manocha <vikas.manocha@st.com>
Cc: Jagannadh Teki <jteki@openedev.com>
Cc: Pavel Machek <pavel@denx.de>
---
 arch/arm/dts/socfpga_cyclone5_socdk.dts |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

Comments

Marek Vasut Sept. 3, 2015, 2:20 p.m. UTC | #1 
On Thursday, September 03, 2015 at 03:42:02 PM, Chin Liang See wrote:
> With a working QSPI calibration, the SCLK can now run up to 100MHz
> 
> Signed-off-by: Chin Liang See <clsee@altera.com>
> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> Cc: Dinh Nguyen <dinh.linux@gmail.com>
> Cc: Marek Vasut <marex@denx.de>
> Cc: Stefan Roese <sr@denx.de>
> Cc: Vikas Manocha <vikas.manocha@st.com>
> Cc: Jagannadh Teki <jteki@openedev.com>
> Cc: Pavel Machek <pavel@denx.de>

Reviewed-by: Marek Vasut <marex@denx.de>

Best regards,
Marek Vasut
diff mbox

Patch

diff --git a/arch/arm/dts/socfpga_cyclone5_socdk.dts b/arch/arm/dts/socfpga_cyclone5_socdk.dts
index 9650eb0..04e5695 100644
--- a/arch/arm/dts/socfpga_cyclone5_socdk.dts
+++ b/arch/arm/dts/socfpga_cyclone5_socdk.dts
@@ -86,7 +86,7 @@ 
 		#size-cells = <1>;
 		compatible = "n25q00";
 		reg = <0>;      /* chip select */
-		spi-max-frequency = <50000000>;
+		spi-max-frequency = <100000000>;
 		m25p,fast-read;
 		page-size = <256>;
 		block-size = <16>; /* 2^16, 64KB */