From patchwork Thu Sep 3 12:37:32 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 514042 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 0606A1401CD for ; Thu, 3 Sep 2015 22:36:54 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=aIM1QYFf; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 26C984B80F; Thu, 3 Sep 2015 14:36:19 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 08PyPy9BlO-z; Thu, 3 Sep 2015 14:36:18 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 26EB64B80E; Thu, 3 Sep 2015 14:35:51 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id BD79C4B72F for ; Thu, 3 Sep 2015 14:35:33 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id YV4rfrTkHC0Q for ; Thu, 3 Sep 2015 14:35:33 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pa0-f54.google.com (mail-pa0-f54.google.com [209.85.220.54]) by theia.denx.de (Postfix) with ESMTPS id 0DED74B796 for ; Thu, 3 Sep 2015 14:35:21 +0200 (CEST) Received: by pacfv12 with SMTP id fv12so46776617pac.2 for ; Thu, 03 Sep 2015 05:35:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=uIiYtVyq/aN2YA2/9lucN/hhYW1JpPKvo36gCKPButw=; b=aIM1QYFf7EUAap62rCA7TQ/ejUbEfWbDWF7olS+Ycm6nOUTsm++Q/fC/rkIATz3d1P jetXhZbMwA0Y2R08wdnQVanqqFruB1ioHjL4oHtLHl7nz/axvi5t3z2dsiI+9R8VOzGX 2E1bVi4Yy2G7rXgX8LfTAAypaDOKYI6mU2Df4y2GMdLIkXgR00l7VayigyK9sU7AY/Gz Gih9RjDSFurY24OL4XdM0I2duSH4gPAa/a9fKeTFMuxZNz1pFPdrJHo5S5PaBrx6unFY qslZFl6jrFll6egeTe6ORJHFu2Y3PhPz7Nl8TyJ1sy6m1njG0q4fwWa1yNsqHMZuW6ew nwGw== X-Received: by 10.68.94.3 with SMTP id cy3mr66502525pbb.113.1441283720298; Thu, 03 Sep 2015 05:35:20 -0700 (PDT) Received: from ala-d2121-lx1.wrs.com (unknown-157-139.windriver.com. [147.11.157.139]) by smtp.gmail.com with ESMTPSA id ev2sm25165500pbb.37.2015.09.03.05.35.19 (version=TLS1_1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 03 Sep 2015 05:35:19 -0700 (PDT) From: Bin Meng To: Simon Glass , U-Boot Mailing List Date: Thu, 3 Sep 2015 05:37:32 -0700 Message-Id: <1441283853-30868-11-git-send-email-bmeng.cn@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1441283853-30868-1-git-send-email-bmeng.cn@gmail.com> References: <1441283853-30868-1-git-send-email-bmeng.cn@gmail.com> Cc: Joe Hershberger Subject: [U-Boot] [PATCH v4 10/11] x86: Convert to use driver model eth on quark/galileo X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Convert to use DM version of Designware ethernet driver on Intel quark/galileo. Signed-off-by: Bin Meng Acked-by: Simon Glass --- Changes in v4: None Changes in v3: None Changes in v2: None arch/x86/cpu/quark/quark.c | 19 ------------------- configs/galileo_defconfig | 2 +- 2 files changed, 1 insertion(+), 20 deletions(-) diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c index 637c370..caa3875 100644 --- a/arch/x86/cpu/quark/quark.c +++ b/arch/x86/cpu/quark/quark.c @@ -6,8 +6,6 @@ #include #include -#include -#include #include #include #include @@ -231,23 +229,6 @@ int cpu_mmc_init(bd_t *bis) ARRAY_SIZE(mmc_supported)); } -int cpu_eth_init(bd_t *bis) -{ - u32 base; - int ret0, ret1; - - qrk_pci_read_config_dword(QUARK_EMAC0, PCI_BASE_ADDRESS_0, &base); - ret0 = designware_initialize(base, PHY_INTERFACE_MODE_RMII); - - qrk_pci_read_config_dword(QUARK_EMAC1, PCI_BASE_ADDRESS_0, &base); - ret1 = designware_initialize(base, PHY_INTERFACE_MODE_RMII); - - if (ret0 < 0 && ret1 < 0) - return -1; - else - return 0; -} - void cpu_irq_init(void) { struct quark_rcba *rcba; diff --git a/configs/galileo_defconfig b/configs/galileo_defconfig index d05154e..9623986 100644 --- a/configs/galileo_defconfig +++ b/configs/galileo_defconfig @@ -12,7 +12,7 @@ CONFIG_BOOTSTAGE_REPORT=y CONFIG_CMD_BOOTSTAGE=y CONFIG_OF_CONTROL=y CONFIG_SPI_FLASH=y -CONFIG_NETDEVICES=y +CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_DM_PCI=y CONFIG_DM_RTC=y