| Message ID | 1440653169-22715-1-git-send-email-qiang.zhao@freescale.com |
|---|---|
| State | Superseded |
| Delegated to: | York Sun |
| Headers | show |
> -----Original Message----- > From: Zhao Qiang [mailto:qiang.zhao@freescale.com] > Sent: Thursday, August 27, 2015 10:56 AM > To: Kushwaha Prabhakar-B32579 <prabhakar@freescale.com> > Cc: u-boot@lists.denx.de; Sun York-R58495 <yorksun@freescale.com>; Jain > Priyanka-B32167 <Priyanka.Jain@freescale.com>; Zhao Qiang-B45475 > <qiang.zhao@freescale.com> > Subject: [PATCH] t1040d4rdb: assign muxed pins to qe-tdm when set > hwconfig qe-tdm > > qe-tdm is muxed with diu, if hwconfig setted as qe-tdm, assign muxed pins > to qe-tdm, then delete diu node from device tree. > > Signed-off-by: Zhao Qiang <qiang.zhao@freescale.com> > --- > board/freescale/t104xrdb/cpld.h | 1 + > board/freescale/t104xrdb/t104xrdb.c | 19 +++++++++++++++++++ > 2 files changed, 20 insertions(+) > > diff --git a/board/freescale/t104xrdb/cpld.h > b/board/freescale/t104xrdb/cpld.h index 2fb4105..86de26c 100644 > --- a/board/freescale/t104xrdb/cpld.h > +++ b/board/freescale/t104xrdb/cpld.h > @@ -44,3 +44,4 @@ void cpld_write(unsigned int reg, u8 value); > cpld_write(offsetof(struct cpld_data, reg), value) > #define MISC_CTL_SG_SEL 0x80 > #define MISC_CTL_AURORA_SEL 0x02 > +#define MISC_MUX_QE_TDM 0xc0 > diff --git a/board/freescale/t104xrdb/t104xrdb.c > b/board/freescale/t104xrdb/t104xrdb.c > index d982dfc..1759d1f 100644 > --- a/board/freescale/t104xrdb/t104xrdb.c > +++ b/board/freescale/t104xrdb/t104xrdb.c > @@ -6,6 +6,7 @@ > > #include <common.h> > #include <command.h> > +#include <hwconfig.h> > #include <netdev.h> > #include <linux/compiler.h> > #include <asm/mmu.h> > @@ -110,6 +111,12 @@ int misc_init_r(void) > MISC_CTL_SG_SEL | > MISC_CTL_AURORA_SEL); > > #if defined(CONFIG_T1040D4RDB) > + if (hwconfig("qe-tdm")) { > + CPLD_WRITE(sfp_ctl_status, CPLD_READ(sfp_ctl_status) | > + MISC_MUX_QE_TDM); > + printf("QECSR : 0x%02x, mux to qe-tdm\n", > + CPLD_READ(sfp_ctl_status)); > + } > /* Mask all CPLD interrupt sources, except QSGMII interrupts */ > if (CPLD_READ(sw_ver) < 0x03) { > debug("CPLD SW version 0x%02x doesn't support > int_mask\n", @@ -123,6 +130,16 @@ int misc_init_r(void) > return 0; > } > > +void fdt_del_diu(void *blob) > +{ > + int nodeoff = 0; > + > + while ((nodeoff = fdt_node_offset_by_compatible(blob, 0, > + "fsl,diu")) >= 0) { > + fdt_del_node(blob, nodeoff); > + } > +} > + Can this be moved in arch/powerpc for SoC to leverage this piece of code? --prabhakar
On Thu 8/27/2015 2:36 pm, Kushwaha Prabhakar-B32579 wrote: > -----Original Message----- > From: Kushwaha Prabhakar-B32579 > Sent: Thursday, August 27, 2015 2:36 PM > To: Zhao Qiang-B45475 > Cc: u-boot@lists.denx.de; Sun York-R58495; Jain Priyanka-B32167; Zhao > Qiang-B45475 > Subject: RE: [PATCH] t1040d4rdb: assign muxed pins to qe-tdm when set > hwconfig qe-tdm > > > -----Original Message----- > > From: Zhao Qiang [mailto:qiang.zhao@freescale.com] > > Sent: Thursday, August 27, 2015 10:56 AM > > To: Kushwaha Prabhakar-B32579 <prabhakar@freescale.com> > > Cc: u-boot@lists.denx.de; Sun York-R58495 <yorksun@freescale.com>; > > Jain > > Priyanka-B32167 <Priyanka.Jain@freescale.com>; Zhao Qiang-B45475 > > <qiang.zhao@freescale.com> > > Subject: [PATCH] t1040d4rdb: assign muxed pins to qe-tdm when set > > hwconfig qe-tdm > > > > qe-tdm is muxed with diu, if hwconfig setted as qe-tdm, assign muxed > > pins to qe-tdm, then delete diu node from device tree. > > > > Signed-off-by: Zhao Qiang <qiang.zhao@freescale.com> > > --- > > board/freescale/t104xrdb/cpld.h | 1 + > > board/freescale/t104xrdb/t104xrdb.c | 19 +++++++++++++++++++ > > 2 files changed, 20 insertions(+) > > > > diff --git a/board/freescale/t104xrdb/cpld.h > > b/board/freescale/t104xrdb/cpld.h index 2fb4105..86de26c 100644 > > --- a/board/freescale/t104xrdb/cpld.h > > +++ b/board/freescale/t104xrdb/cpld.h > > @@ -44,3 +44,4 @@ void cpld_write(unsigned int reg, u8 value); > > cpld_write(offsetof(struct cpld_data, reg), value) > > #define MISC_CTL_SG_SEL 0x80 > > #define MISC_CTL_AURORA_SEL 0x02 > > +#define MISC_MUX_QE_TDM 0xc0 > > diff --git a/board/freescale/t104xrdb/t104xrdb.c > > b/board/freescale/t104xrdb/t104xrdb.c > > index d982dfc..1759d1f 100644 > > --- a/board/freescale/t104xrdb/t104xrdb.c > > +++ b/board/freescale/t104xrdb/t104xrdb.c > > @@ -6,6 +6,7 @@ > > > > #include <common.h> > > #include <command.h> > > +#include <hwconfig.h> > > #include <netdev.h> > > #include <linux/compiler.h> > > #include <asm/mmu.h> > > @@ -110,6 +111,12 @@ int misc_init_r(void) > > MISC_CTL_SG_SEL | > > MISC_CTL_AURORA_SEL); > > > > #if defined(CONFIG_T1040D4RDB) > > + if (hwconfig("qe-tdm")) { > > + CPLD_WRITE(sfp_ctl_status, CPLD_READ(sfp_ctl_status) | > > + MISC_MUX_QE_TDM); > > + printf("QECSR : 0x%02x, mux to qe-tdm\n", > > + CPLD_READ(sfp_ctl_status)); > > + } > > /* Mask all CPLD interrupt sources, except QSGMII interrupts */ > > if (CPLD_READ(sw_ver) < 0x03) { > > debug("CPLD SW version 0x%02x doesn't support int_mask\n", @@ > > -123,6 +130,16 @@ int misc_init_r(void) > > return 0; > > } > > > > +void fdt_del_diu(void *blob) > > +{ > > + int nodeoff = 0; > > + > > + while ((nodeoff = fdt_node_offset_by_compatible(blob, 0, > > + "fsl,diu")) >= 0) { > > + fdt_del_node(blob, nodeoff); > > + } > > +} > > + > > Can this be moved in arch/powerpc for SoC to leverage this piece of code? How about to add new files arch/powerpc/include/asm/fdt.h and arch/powerpc/lib/fdt.c, and put the code into the files, Or do you have some better place to recommend? > > --prabhakar
Regards, Prabhakar > -----Original Message----- > From: Zhao Qiang-B45475 > Sent: Thursday, August 27, 2015 1:00 PM > To: Kushwaha Prabhakar-B32579 <prabhakar@freescale.com> > Cc: u-boot@lists.denx.de; Sun York-R58495 <yorksun@freescale.com>; Jain > Priyanka-B32167 <Priyanka.Jain@freescale.com> > Subject: RE: [PATCH] t1040d4rdb: assign muxed pins to qe-tdm when set > hwconfig qe-tdm > > On Thu 8/27/2015 2:36 pm, Kushwaha Prabhakar-B32579 wrote: > > -----Original Message----- > > From: Kushwaha Prabhakar-B32579 > > Sent: Thursday, August 27, 2015 2:36 PM > > To: Zhao Qiang-B45475 > > Cc: u-boot@lists.denx.de; Sun York-R58495; Jain Priyanka-B32167; Zhao > > Qiang-B45475 > > Subject: RE: [PATCH] t1040d4rdb: assign muxed pins to qe-tdm when set > > hwconfig qe-tdm > > > > > -----Original Message----- > > > From: Zhao Qiang [mailto:qiang.zhao@freescale.com] > > > Sent: Thursday, August 27, 2015 10:56 AM > > > To: Kushwaha Prabhakar-B32579 <prabhakar@freescale.com> > > > Cc: u-boot@lists.denx.de; Sun York-R58495 <yorksun@freescale.com>; > > > Jain > > > Priyanka-B32167 <Priyanka.Jain@freescale.com>; Zhao Qiang-B45475 > > > <qiang.zhao@freescale.com> > > > Subject: [PATCH] t1040d4rdb: assign muxed pins to qe-tdm when set > > > hwconfig qe-tdm > > > > > > qe-tdm is muxed with diu, if hwconfig setted as qe-tdm, assign muxed > > > pins to qe-tdm, then delete diu node from device tree. > > > > > > Signed-off-by: Zhao Qiang <qiang.zhao@freescale.com> > > > --- > > > board/freescale/t104xrdb/cpld.h | 1 + > > > board/freescale/t104xrdb/t104xrdb.c | 19 +++++++++++++++++++ > > > 2 files changed, 20 insertions(+) > > > > > > diff --git a/board/freescale/t104xrdb/cpld.h > > > b/board/freescale/t104xrdb/cpld.h index 2fb4105..86de26c 100644 > > > --- a/board/freescale/t104xrdb/cpld.h > > > +++ b/board/freescale/t104xrdb/cpld.h > > > @@ -44,3 +44,4 @@ void cpld_write(unsigned int reg, u8 value); > > > cpld_write(offsetof(struct cpld_data, reg), value) > > > #define MISC_CTL_SG_SEL 0x80 > > > #define MISC_CTL_AURORA_SEL 0x02 > > > +#define MISC_MUX_QE_TDM 0xc0 > > > diff --git a/board/freescale/t104xrdb/t104xrdb.c > > > b/board/freescale/t104xrdb/t104xrdb.c > > > index d982dfc..1759d1f 100644 > > > --- a/board/freescale/t104xrdb/t104xrdb.c > > > +++ b/board/freescale/t104xrdb/t104xrdb.c > > > @@ -6,6 +6,7 @@ > > > > > > #include <common.h> > > > #include <command.h> > > > +#include <hwconfig.h> > > > #include <netdev.h> > > > #include <linux/compiler.h> > > > #include <asm/mmu.h> > > > @@ -110,6 +111,12 @@ int misc_init_r(void) > > > MISC_CTL_SG_SEL | > > > MISC_CTL_AURORA_SEL); > > > > > > #if defined(CONFIG_T1040D4RDB) > > > + if (hwconfig("qe-tdm")) { > > > + CPLD_WRITE(sfp_ctl_status, CPLD_READ(sfp_ctl_status) | > > > + MISC_MUX_QE_TDM); > > > + printf("QECSR : 0x%02x, mux to qe-tdm\n", > > > + CPLD_READ(sfp_ctl_status)); > > > + } > > > /* Mask all CPLD interrupt sources, except QSGMII interrupts */ > > > if (CPLD_READ(sw_ver) < 0x03) { > > > debug("CPLD SW version 0x%02x doesn't support > int_mask\n", @@ > > > -123,6 +130,16 @@ int misc_init_r(void) > > > return 0; > > > } > > > > > > +void fdt_del_diu(void *blob) > > > +{ > > > + int nodeoff = 0; > > > + > > > + while ((nodeoff = fdt_node_offset_by_compatible(blob, 0, > > > + "fsl,diu")) >= 0) { > > > + fdt_del_node(blob, nodeoff); > > > + } > > > +} > > > + > > > > Can this be moved in arch/powerpc for SoC to leverage this piece of code? > > How about to add new files arch/powerpc/include/asm/fdt.h and > arch/powerpc/lib/fdt.c, and put the code into the files, Or do you have some > better place to recommend? We already have file " arch/powerpc/cpu/mpc85xx/fdt.c" --prabhakar
> -----Original Message----- > From: Kushwaha Prabhakar-B32579 > Sent: Thursday, August 27, 2015 4:23 PM > To: Zhao Qiang-B45475 > Cc: u-boot@lists.denx.de; Sun York-R58495; Jain Priyanka-B32167 > Subject: RE: [PATCH] t1040d4rdb: assign muxed pins to qe-tdm when set > hwconfig qe-tdm > > > > -----Original Message----- > > From: Zhao Qiang-B45475 > > Sent: Thursday, August 27, 2015 1:00 PM > > To: Kushwaha Prabhakar-B32579 <prabhakar@freescale.com> > > Cc: u-boot@lists.denx.de; Sun York-R58495 <yorksun@freescale.com>; > > Jain > > Priyanka-B32167 <Priyanka.Jain@freescale.com> > > Subject: RE: [PATCH] t1040d4rdb: assign muxed pins to qe-tdm when set > > hwconfig qe-tdm > > > > On Thu 8/27/2015 2:36 pm, Kushwaha Prabhakar-B32579 wrote: > > > -----Original Message----- > > > From: Kushwaha Prabhakar-B32579 > > > Sent: Thursday, August 27, 2015 2:36 PM > > > To: Zhao Qiang-B45475 > > > Cc: u-boot@lists.denx.de; Sun York-R58495; Jain Priyanka-B32167; > > > Zhao > > > Qiang-B45475 > > > Subject: RE: [PATCH] t1040d4rdb: assign muxed pins to qe-tdm when > > > set hwconfig qe-tdm > > > > > > > -----Original Message----- > > > > From: Zhao Qiang [mailto:qiang.zhao@freescale.com] > > > > Sent: Thursday, August 27, 2015 10:56 AM > > > > To: Kushwaha Prabhakar-B32579 <prabhakar@freescale.com> > > > > Cc: u-boot@lists.denx.de; Sun York-R58495 <yorksun@freescale.com>; > > > > Jain > > > > Priyanka-B32167 <Priyanka.Jain@freescale.com>; Zhao Qiang-B45475 > > > > <qiang.zhao@freescale.com> > > > > Subject: [PATCH] t1040d4rdb: assign muxed pins to qe-tdm when set > > > > hwconfig qe-tdm > > > > > > > > qe-tdm is muxed with diu, if hwconfig setted as qe-tdm, assign > > > > muxed pins to qe-tdm, then delete diu node from device tree. > > > > > > > > Signed-off-by: Zhao Qiang <qiang.zhao@freescale.com> > > > > --- > > > > board/freescale/t104xrdb/cpld.h | 1 + > > > > board/freescale/t104xrdb/t104xrdb.c | 19 +++++++++++++++++++ > > > > 2 files changed, 20 insertions(+) > > > > > > > > diff --git a/board/freescale/t104xrdb/cpld.h > > > > b/board/freescale/t104xrdb/cpld.h index 2fb4105..86de26c 100644 > > > > --- a/board/freescale/t104xrdb/cpld.h > > > > +++ b/board/freescale/t104xrdb/cpld.h > > > > @@ -44,3 +44,4 @@ void cpld_write(unsigned int reg, u8 value); > > > > cpld_write(offsetof(struct cpld_data, reg), value) > > > > #define MISC_CTL_SG_SEL 0x80 > > > > #define MISC_CTL_AURORA_SEL 0x02 > > > > +#define MISC_MUX_QE_TDM 0xc0 > > > > diff --git a/board/freescale/t104xrdb/t104xrdb.c > > > > b/board/freescale/t104xrdb/t104xrdb.c > > > > index d982dfc..1759d1f 100644 > > > > --- a/board/freescale/t104xrdb/t104xrdb.c > > > > +++ b/board/freescale/t104xrdb/t104xrdb.c > > > > @@ -6,6 +6,7 @@ > > > > > > > > #include <common.h> > > > > #include <command.h> > > > > +#include <hwconfig.h> > > > > #include <netdev.h> > > > > #include <linux/compiler.h> > > > > #include <asm/mmu.h> > > > > @@ -110,6 +111,12 @@ int misc_init_r(void) > > > > MISC_CTL_SG_SEL | > > > > MISC_CTL_AURORA_SEL); > > > > > > > > #if defined(CONFIG_T1040D4RDB) > > > > + if (hwconfig("qe-tdm")) { > > > > + CPLD_WRITE(sfp_ctl_status, CPLD_READ(sfp_ctl_status) | > > > > + MISC_MUX_QE_TDM); > > > > + printf("QECSR : 0x%02x, mux to qe-tdm\n", > > > > + CPLD_READ(sfp_ctl_status)); > > > > + } > > > > /* Mask all CPLD interrupt sources, except QSGMII interrupts > */ > > > > if (CPLD_READ(sw_ver) < 0x03) { > > > > debug("CPLD SW version 0x%02x doesn't support > > int_mask\n", @@ > > > > -123,6 +130,16 @@ int misc_init_r(void) > > > > return 0; > > > > } > > > > > > > > +void fdt_del_diu(void *blob) > > > > +{ > > > > + int nodeoff = 0; > > > > + > > > > + while ((nodeoff = fdt_node_offset_by_compatible(blob, 0, > > > > + "fsl,diu")) >= 0) { > > > > + fdt_del_node(blob, nodeoff); > > > > + } > > > > +} > > > > + > > > > > > Can this be moved in arch/powerpc for SoC to leverage this piece of > code? > > > > How about to add new files arch/powerpc/include/asm/fdt.h and > > arch/powerpc/lib/fdt.c, and put the code into the files, Or do you > > have some better place to recommend? > > We already have file " arch/powerpc/cpu/mpc85xx/fdt.c" Where is the .h file? > > --prabhakar
diff --git a/board/freescale/t104xrdb/cpld.h b/board/freescale/t104xrdb/cpld.h index 2fb4105..86de26c 100644 --- a/board/freescale/t104xrdb/cpld.h +++ b/board/freescale/t104xrdb/cpld.h @@ -44,3 +44,4 @@ void cpld_write(unsigned int reg, u8 value); cpld_write(offsetof(struct cpld_data, reg), value) #define MISC_CTL_SG_SEL 0x80 #define MISC_CTL_AURORA_SEL 0x02 +#define MISC_MUX_QE_TDM 0xc0 diff --git a/board/freescale/t104xrdb/t104xrdb.c b/board/freescale/t104xrdb/t104xrdb.c index d982dfc..1759d1f 100644 --- a/board/freescale/t104xrdb/t104xrdb.c +++ b/board/freescale/t104xrdb/t104xrdb.c @@ -6,6 +6,7 @@ #include <common.h> #include <command.h> +#include <hwconfig.h> #include <netdev.h> #include <linux/compiler.h> #include <asm/mmu.h> @@ -110,6 +111,12 @@ int misc_init_r(void) MISC_CTL_SG_SEL | MISC_CTL_AURORA_SEL); #if defined(CONFIG_T1040D4RDB) + if (hwconfig("qe-tdm")) { + CPLD_WRITE(sfp_ctl_status, CPLD_READ(sfp_ctl_status) | + MISC_MUX_QE_TDM); + printf("QECSR : 0x%02x, mux to qe-tdm\n", + CPLD_READ(sfp_ctl_status)); + } /* Mask all CPLD interrupt sources, except QSGMII interrupts */ if (CPLD_READ(sw_ver) < 0x03) { debug("CPLD SW version 0x%02x doesn't support int_mask\n", @@ -123,6 +130,16 @@ int misc_init_r(void) return 0; } +void fdt_del_diu(void *blob) +{ + int nodeoff = 0; + + while ((nodeoff = fdt_node_offset_by_compatible(blob, 0, + "fsl,diu")) >= 0) { + fdt_del_node(blob, nodeoff); + } +} + int ft_board_setup(void *blob, bd_t *bd) { phys_addr_t base; @@ -149,5 +166,7 @@ int ft_board_setup(void *blob, bd_t *bd) fdt_fixup_fman_ethernet(blob); #endif + if (hwconfig("qe-tdm")) + fdt_del_diu(blob); return 0; }
qe-tdm is muxed with diu, if hwconfig setted as qe-tdm, assign muxed pins to qe-tdm, then delete diu node from device tree. Signed-off-by: Zhao Qiang <qiang.zhao@freescale.com> --- board/freescale/t104xrdb/cpld.h | 1 + board/freescale/t104xrdb/t104xrdb.c | 19 +++++++++++++++++++ 2 files changed, 20 insertions(+)