From patchwork Wed Aug 26 13:17:27 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 510856 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id E3D3F1401C7 for ; Wed, 26 Aug 2015 23:15:38 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=T2FSuISY; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D5BDC4B695; Wed, 26 Aug 2015 15:15:35 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id aWQBBdeDpPql; Wed, 26 Aug 2015 15:15:35 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id EB8E24B681; Wed, 26 Aug 2015 15:15:27 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B08D64B667 for ; Wed, 26 Aug 2015 15:15:22 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id VfryTEJvWr_o for ; Wed, 26 Aug 2015 15:15:22 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pa0-f54.google.com (mail-pa0-f54.google.com [209.85.220.54]) by theia.denx.de (Postfix) with ESMTPS id 31B8E4B65B for ; Wed, 26 Aug 2015 15:15:18 +0200 (CEST) Received: by pacdd16 with SMTP id dd16so160684026pac.2 for ; Wed, 26 Aug 2015 06:15:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:subject:date:message-id:in-reply-to:references; bh=cd5rPnfXb/djLICmA+RFeqF9BurKEBMltLcz0Rpte3Y=; b=T2FSuISYnQrLd2Y5WZqQWi+BmyzltnAcCdFhPNHlgj7YPrn3mW3tSlc6T/n7ihAeQH eCY1xRz97yVrWF0/Ke0fCpBqrpBL80f1ayVpDDOFFp/d5UGFDcl31SY9YoSAQRIbWWiF WJdE/jeXweqdJNkRAB6LV1H9EK8zaDN2MlQG+TvzHHYju97dImhdyrkJlXk3s01GG6O2 PpZECP9k5bjd+Jeq0nDf4wnADfQ2Ld0l8JvXiQbOwMZiJVCxCvtq40ATFRX+BUxw7s3W n9eUBgz/xbCCeKreEQRGLPyXt1lZyXPk1a/wLYt8vyiJiHIP1MAS/D4uUUveHtOje1AC wRJg== X-Received: by 10.68.166.196 with SMTP id zi4mr68644348pbb.83.1440594917357; Wed, 26 Aug 2015 06:15:17 -0700 (PDT) Received: from ala-d2121-lx1.wrs.com (unknown-157-139.windriver.com. [147.11.157.139]) by smtp.gmail.com with ESMTPSA id hb1sm24712137pbd.36.2015.08.26.06.15.16 (version=TLS1_1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 26 Aug 2015 06:15:16 -0700 (PDT) From: Bin Meng To: Simon Glass , Joe Hershberger , U-Boot Mailing List , Tom Rini Date: Wed, 26 Aug 2015 06:17:27 -0700 Message-Id: <1440595055-26333-2-git-send-email-bmeng.cn@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1440595055-26333-1-git-send-email-bmeng.cn@gmail.com> References: <1440595055-26333-1-git-send-email-bmeng.cn@gmail.com> Subject: [U-Boot] [PATCH v2 02/10] net: e1000: Fix build warnings for 32-bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" commit 6497e37 "net: e1000: Support 64-bit physical address" causes compiler warnings on 32-bit U-Boot build below. drivers/net/e1000.c: In function 'e1000_configure_tx': drivers/net/e1000.c:4982:2: warning: right shift count >= width of type [enabled by default] drivers/net/e1000.c: In function 'e1000_configure_rx': drivers/net/e1000.c:5126:2: warning: right shift count >= width of type [enabled by default] This commit fixes the build warnings. Signed-off-by: Bin Meng Acked-by: Simon Glass Acked-by: Joe Hershberger --- Changes in v2: - Use lower_32_bits() and upper_32_bits() drivers/net/e1000.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c index 6f74d30..7b830ff 100644 --- a/drivers/net/e1000.c +++ b/drivers/net/e1000.c @@ -4978,8 +4978,8 @@ e1000_configure_tx(struct e1000_hw *hw) unsigned long tipg, tarc; uint32_t ipgr1, ipgr2; - E1000_WRITE_REG(hw, TDBAL, (unsigned long)tx_base & 0xffffffff); - E1000_WRITE_REG(hw, TDBAH, (unsigned long)tx_base >> 32); + E1000_WRITE_REG(hw, TDBAL, lower_32_bits((unsigned long)tx_base)); + E1000_WRITE_REG(hw, TDBAH, upper_32_bits((unsigned long)tx_base)); E1000_WRITE_REG(hw, TDLEN, 128); @@ -5103,6 +5103,7 @@ e1000_configure_rx(struct e1000_hw *hw) { unsigned long rctl, ctrl_ext; rx_tail = 0; + /* make sure receives are disabled while setting up the descriptors */ rctl = E1000_READ_REG(hw, RCTL); E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN); @@ -5122,8 +5123,8 @@ e1000_configure_rx(struct e1000_hw *hw) E1000_WRITE_FLUSH(hw); } /* Setup the Base and Length of the Rx Descriptor Ring */ - E1000_WRITE_REG(hw, RDBAL, (unsigned long)rx_base & 0xffffffff); - E1000_WRITE_REG(hw, RDBAH, (unsigned long)rx_base >> 32); + E1000_WRITE_REG(hw, RDBAL, lower_32_bits((unsigned long)rx_base)); + E1000_WRITE_REG(hw, RDBAH, upper_32_bits((unsigned long)rx_base)); E1000_WRITE_REG(hw, RDLEN, 128);