From patchwork Wed Aug 19 10:46:26 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 508693 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 62307140784 for ; Wed, 19 Aug 2015 20:46:59 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D55AC4B794; Wed, 19 Aug 2015 12:46:52 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id RH3zO9Oq1G1M; Wed, 19 Aug 2015 12:46:52 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id F18A94B77D; Wed, 19 Aug 2015 12:46:48 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D76244B758 for ; Wed, 19 Aug 2015 12:46:42 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id JQSGK7n6Clkp for ; Wed, 19 Aug 2015 12:46:42 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from devils.ext.ti.com (devils.ext.ti.com [198.47.26.153]) by theia.denx.de (Postfix) with ESMTPS id 6B57D4B721 for ; Wed, 19 Aug 2015 12:46:40 +0200 (CEST) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id t7JAkbLQ001616; Wed, 19 Aug 2015 05:46:37 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id t7JAkbKs014670; Wed, 19 Aug 2015 05:46:37 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.224.2; Wed, 19 Aug 2015 05:46:37 -0500 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id t7JAkTiI015015; Wed, 19 Aug 2015 05:46:35 -0500 From: Kishon Vijay Abraham I To: , , , Date: Wed, 19 Aug 2015 16:16:26 +0530 Message-ID: <1439981189-17571-3-git-send-email-kishon@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1439981189-17571-1-git-send-email-kishon@ti.com> References: <1439981189-17571-1-git-send-email-kishon@ti.com> MIME-Version: 1.0 Cc: kishon@ti.com Subject: [U-Boot] [PATCH v2 2/4] ARM: AM43xx: Add functions to enable and disable USB clocks X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Added functions to enable and disable USB clocks which can be invoked during USB init and USB exit respectively. Cc: Roger Quadros Cc: Tero Kristo Cc: Nishanth Menon Signed-off-by: Kishon Vijay Abraham I Reviewed-by: Tom Rini --- arch/arm/cpu/armv7/am33xx/clock_am43xx.c | 70 ++++++++++++++++++++++++++ arch/arm/include/asm/arch-am33xx/sys_proto.h | 3 ++ 2 files changed, 73 insertions(+) diff --git a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c index 35c431e..cad8d46 100644 --- a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c +++ b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c @@ -171,3 +171,73 @@ void disable_edma3_clocks(void) 1); } #endif + +#ifdef CONFIG_USB_DWC3 +void enable_usb_clocks(int index) +{ + u32 *usbclkctrl = 0; + u32 *usbphyocp2scpclkctrl = 0; + + if (index == 0) { + usbclkctrl = &cmper->usb0clkctrl; + usbphyocp2scpclkctrl = &cmper->usbphyocp2scp0clkctrl; + setbits_le32(&cmper->usb0clkctrl, + USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960); + setbits_le32(&cmwkup->usbphy0clkctrl, + USBPHY0_CLKCTRL_OPTFCLKEN_CLK32K); + } else if (index == 1) { + usbclkctrl = &cmper->usb1clkctrl; + usbphyocp2scpclkctrl = &cmper->usbphyocp2scp1clkctrl; + setbits_le32(&cmper->usb1clkctrl, + USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960); + setbits_le32(&cmwkup->usbphy1clkctrl, + USBPHY0_CLKCTRL_OPTFCLKEN_CLK32K); + } + + u32 *const clk_domains_usb[] = { + 0 + }; + + u32 *const clk_modules_explicit_en_usb[] = { + usbclkctrl, + usbphyocp2scpclkctrl, + 0 + }; + + do_enable_clocks(clk_domains_usb, clk_modules_explicit_en_usb, 1); +} + +void disable_usb_clocks(int index) +{ + u32 *usbclkctrl = 0; + u32 *usbphyocp2scpclkctrl = 0; + + if (index == 0) { + usbclkctrl = &cmper->usb0clkctrl; + usbphyocp2scpclkctrl = &cmper->usbphyocp2scp0clkctrl; + clrbits_le32(&cmper->usb0clkctrl, + USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960); + clrbits_le32(&cmwkup->usbphy0clkctrl, + USBPHY0_CLKCTRL_OPTFCLKEN_CLK32K); + } else if (index == 1) { + usbclkctrl = &cmper->usb1clkctrl; + usbphyocp2scpclkctrl = &cmper->usbphyocp2scp1clkctrl; + clrbits_le32(&cmper->usb1clkctrl, + USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960); + clrbits_le32(&cmwkup->usbphy1clkctrl, + USBPHY0_CLKCTRL_OPTFCLKEN_CLK32K); + } + + u32 *const clk_domains_usb[] = { + 0 + }; + + u32 *const clk_modules_disable_usb[] = { + usbclkctrl, + usbphyocp2scpclkctrl, + 0 + }; + + do_disable_clocks(clk_domains_usb, clk_modules_disable_usb, 1); +} +#endif diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h b/arch/arm/include/asm/arch-am33xx/sys_proto.h index 91b614a..8f573d2 100644 --- a/arch/arm/include/asm/arch-am33xx/sys_proto.h +++ b/arch/arm/include/asm/arch-am33xx/sys_proto.h @@ -42,3 +42,6 @@ void am33xx_spl_board_init(void); int am335x_get_efuse_mpu_max_freq(struct ctrl_dev *cdev); int am335x_get_tps65910_mpu_vdd(int sil_rev, int frequency); #endif + +void enable_usb_clocks(int index); +void disable_usb_clocks(int index);