From patchwork Sat Aug 1 21:34:38 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 502853 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 183D01402ED for ; Sun, 2 Aug 2015 07:36:33 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 96B7E4BDA6; Sat, 1 Aug 2015 23:36:20 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id hVl3qiaY5_bj; Sat, 1 Aug 2015 23:36:20 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 244154BD73; Sat, 1 Aug 2015 23:35:40 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 42C014BD17 for ; Sat, 1 Aug 2015 23:35:17 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Z-GRr1YO_Qrc for ; Sat, 1 Aug 2015 23:35:17 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.9]) by theia.denx.de (Postfix) with ESMTPS id 0747F4BD18 for ; Sat, 1 Aug 2015 23:35:16 +0200 (CEST) Received: from mail.nefkom.net (unknown [192.168.8.184]) by mail-out.m-online.net (Postfix) with ESMTP id 3mkJfm1hwSz3hjDZ; Sat, 1 Aug 2015 23:35:12 +0200 (CEST) X-Auth-Info: kL7q6bqZ2Y3BPgZtcvx60xMJ3BKN/2B8WPwgRibCf2Y= Received: from chi.lan (host-82-135-33-74.customer.m-online.net [82.135.33.74]) by smtp-auth.mnet-online.de (Postfix) with ESMTPA id 3mkJfl45LWzvdWt; Sat, 1 Aug 2015 23:35:11 +0200 (CEST) From: Marek Vasut To: u-boot@lists.denx.de Date: Sat, 1 Aug 2015 23:34:38 +0200 Message-Id: <1438464897-8051-10-git-send-email-marex@denx.de> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1438464897-8051-1-git-send-email-marex@denx.de> References: <1438464897-8051-1-git-send-email-marex@denx.de> Cc: Marek Vasut , trini@konsulko.com Subject: [U-Boot] [PATCH 09/28] ddr: altera: sdram: Clean up set_sdr_mp_weight() X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Get rid of the constant clrsetbits_le32(), instead prepare the whole content of the register once and write it at the end of the function. Signed-off-by: Marek Vasut --- drivers/ddr/altera/sdram.c | 37 ++++++++++++++++--------------------- 1 file changed, 16 insertions(+), 21 deletions(-) diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c index 8db8dde..f324805 100644 --- a/drivers/ddr/altera/sdram.c +++ b/drivers/ddr/altera/sdram.c @@ -417,31 +417,26 @@ static void set_sdr_fifo_cfg(void) static void set_sdr_mp_weight(void) { - debug("Configuring MPWEIGHT_MPWEIGHT_0\n"); - clrsetbits_le32(&sdr_ctrl->mp_weight0, - SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_0_STATICWEIGHT_31_0_MASK, - CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0 << + const u32 mp_weight0 = + (CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_0_STATICWEIGHT_31_0 << SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_0_STATICWEIGHT_31_0_LSB); - - clrsetbits_le32(&sdr_ctrl->mp_weight1, - SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_1_STATICWEIGHT_49_32_MASK, - CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32 << - SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_1_STATICWEIGHT_49_32_LSB); - - clrsetbits_le32(&sdr_ctrl->mp_weight1, - SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_1_SUMOFWEIGHTS_13_0_MASK, - CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0 << + const u32 mp_weight1 = + (CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_STATICWEIGHT_49_32 << + SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_1_STATICWEIGHT_49_32_LSB) | + (CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_1_SUMOFWEIGHT_13_0 << SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_1_SUMOFWEIGHTS_13_0_LSB); - - clrsetbits_le32(&sdr_ctrl->mp_weight2, - SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_2_SUMOFWEIGHTS_45_14_MASK, - CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14 << + const u32 mp_weight2 = + (CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_2_SUMOFWEIGHT_45_14 << SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_2_SUMOFWEIGHTS_45_14_LSB); - - clrsetbits_le32(&sdr_ctrl->mp_weight3, - SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_3_SUMOFWEIGHTS_63_46_MASK, - CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46 << + const u32 mp_weight3 = + (CONFIG_HPS_SDR_CTRLCFG_MPWIEIGHT_3_SUMOFWEIGHT_63_46 << SDR_CTRLGRP_MPWEIGHT_MPWEIGHT_3_SUMOFWEIGHTS_63_46_LSB); + + debug("Configuring MPWEIGHT_MPWEIGHT_0\n"); + writel(mp_weight0, &sdr_ctrl->mp_weight0); + writel(mp_weight1, &sdr_ctrl->mp_weight1); + writel(mp_weight2, &sdr_ctrl->mp_weight2); + writel(mp_weight3, &sdr_ctrl->mp_weight3); } static void set_sdr_mp_pacing(void)