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25:B6zVbhd4wHDV+Cj5DqiIwe2IqMqUthpQ9V1Y0TOxN+TcPyGYQtm/HjTmlkcA9Fyp9OcK35JA87es8UOP3j7tjxp7fCvkSsYxA6FOkRGCJC/Ii9gljWZMXzwwpY/MGiw4yIs5XjmGg7XAWTxxSzBcTGodIT7F0WEW1YpKKDBPNqlIgcdEDnT14LzzE5kc0ceRx5I77VkCzR8gjioC25z9+LxczSDn7fpgPJ6q8+w+SkEuAWMMSGJY9vWtBTJKJpPq; 23:lYwd0ViWcH0/OP601C69gfIClKTsavJxlpsoi7WnfFvOIdQ9nxrJyadOszcsa3FT0yvqjLvVIZCP/QzdvzVXKoXrZIw4ApPcwraG3w8T3Np3u0zRi5QKCG+1JgbcDf3Lohm2mLyEd9XcOCyGL2zwfh4FTlHpjmdf+d9hFPGbZ5cgljDeMon4ASfwxeH3JA2+VEmAaYuj+LksK2Pm5dVzgGV7Kb7wFb98o9Yju8/S40e+d/9OD43hQ8u28GkxNkmH X-OriginatorOrg: freescale.com Cc: fabio.estevam@freescale.com, u-boot@lists.denx.de Subject: [U-Boot] [PATCH V2 2/2] imx: mx6 add i2c4 clock support for i.MX6SX X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add I2C4 clock support for i.MX6SX. Since we use runtime check, but not macro, we need to remove `#ifdef ..` in crm_regs.h, or gcc will fail to compile the code succesfully. Making the macros only for i.MX6SX open to other i.MX6x maybe not a good choice, but we have runtime check. Signed-off-by: Peng Fan --- Changes v2: correct spelling error in commit log. arch/arm/cpu/armv7/mx6/clock.c | 14 ++++++++++---- arch/arm/include/asm/arch-mx6/crm_regs.h | 5 ++--- 2 files changed, 12 insertions(+), 7 deletions(-) diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c index 7bd78d7..3e94472 100644 --- a/arch/arm/cpu/armv7/mx6/clock.c +++ b/arch/arm/cpu/armv7/mx6/clock.c @@ -126,6 +126,7 @@ int enable_i2c_clk(unsigned char enable, unsigned i2c_num) { u32 reg; u32 mask; + u32 *addr; if (i2c_num > 3) return -EINVAL; @@ -140,14 +141,19 @@ int enable_i2c_clk(unsigned char enable, unsigned i2c_num) reg &= ~mask; __raw_writel(reg, &imx_ccm->CCGR2); } else { - mask = MXC_CCM_CCGR_CG_MASK - << (MXC_CCM_CCGR1_I2C4_SERIAL_OFFSET); - reg = __raw_readl(&imx_ccm->CCGR1); + if (is_cpu_type(MXC_CPU_MX6SX)) { + mask = MXC_CCM_CCGR6_I2C4_MASK; + addr = &imx_ccm->CCGR6; + } else { + mask = MXC_CCM_CCGR1_I2C4_SERIAL_MASK; + addr = &imx_ccm->CCGR1; + } + reg = __raw_readl(addr); if (enable) reg |= mask; else reg &= ~mask; - __raw_writel(reg, &imx_ccm->CCGR1); + __raw_writel(reg, addr); } return 0; } diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h b/arch/arm/include/asm/arch-mx6/crm_regs.h index 5bbf6e0..7d9fe73 100644 --- a/arch/arm/include/asm/arch-mx6/crm_regs.h +++ b/arch/arm/include/asm/arch-mx6/crm_regs.h @@ -742,7 +742,7 @@ struct mxc_ccm_reg { #define MXC_CCM_CCGR6_USDHC4_MASK (3 << MXC_CCM_CCGR6_USDHC4_OFFSET) #define MXC_CCM_CCGR6_EMI_SLOW_OFFSET 10 #define MXC_CCM_CCGR6_EMI_SLOW_MASK (3 << MXC_CCM_CCGR6_EMI_SLOW_OFFSET) -#ifdef CONFIG_MX6SX +/* The following *CCGR6* exist only i.MX6SX */ #define MXC_CCM_CCGR6_PWM8_OFFSET 16 #define MXC_CCM_CCGR6_PWM8_MASK (3 << MXC_CCM_CCGR6_PWM8_OFFSET) #define MXC_CCM_CCGR6_VADC_OFFSET 20 @@ -757,10 +757,9 @@ struct mxc_ccm_reg { #define MXC_CCM_CCGR6_PWM6_MASK (3 << MXC_CCM_CCGR6_PWM6_OFFSET) #define MXC_CCM_CCGR6_PWM7_OFFSET 30 #define MXC_CCM_CCGR6_PWM7_MASK (3 << MXC_CCM_CCGR6_PWM7_OFFSET) -#else +/* The two does not exist on i.MX6SX */ #define MXC_CCM_CCGR6_VDOAXICLK_OFFSET 12 #define MXC_CCM_CCGR6_VDOAXICLK_MASK (3 << MXC_CCM_CCGR6_VDOAXICLK_OFFSET) -#endif #define BM_ANADIG_PLL_SYS_LOCK 0x80000000 #define BP_ANADIG_PLL_SYS_RSVD0 20