From patchwork Mon Jun 15 18:19:30 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vikas MANOCHA X-Patchwork-Id: 484489 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 1206C140325 for ; Tue, 16 Jun 2015 04:26:51 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 0EDD84B65D; Mon, 15 Jun 2015 20:26:47 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id nK9hrZnZGr4c; Mon, 15 Jun 2015 20:26:46 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 51C614B660; Mon, 15 Jun 2015 20:26:44 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8F54E4B61F for ; Mon, 15 Jun 2015 20:26:26 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id kMbUWLxmPL2N for ; Mon, 15 Jun 2015 20:26:26 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [62.209.51.94]) by theia.denx.de (Postfix) with ESMTPS id 1AA434B61C for ; Mon, 15 Jun 2015 20:26:21 +0200 (CEST) Received: from pps.filterd (m0046670.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.14.5/8.14.5) with SMTP id t5FIQLpU011647; Mon, 15 Jun 2015 20:26:21 +0200 Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com with ESMTP id 1v1xcd1fy8-1 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Mon, 15 Jun 2015 20:26:20 +0200 Received: from zeta.dmz-ap.st.com (ns6.st.com [138.198.234.13]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 93F6824; Mon, 15 Jun 2015 18:26:16 +0000 (GMT) Received: from Webmail-ap.st.com (eapex1hubcas3.st.com [10.80.176.67]) by zeta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 2952081C; Mon, 15 Jun 2015 18:26:15 +0000 (GMT) Received: from localhost (10.41.34.229) by Webmail-ap.st.com (10.80.176.7) with Microsoft SMTP Server (TLS) id 8.3.342.0; Tue, 16 Jun 2015 02:26:13 +0800 From: Vikas Manocha To: , , , Date: Mon, 15 Jun 2015 11:19:30 -0700 Message-ID: <1434392374-28193-3-git-send-email-vikas.manocha@st.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1434392374-28193-1-git-send-email-vikas.manocha@st.com> References: <1434392374-28193-1-git-send-email-vikas.manocha@st.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:5.14.151, 1.0.33, 0.0.0000 definitions=2015-06-15_03:2015-06-15, 2015-06-15, 1970-01-01 signatures=0 Subject: [U-Boot] [PATCH 2/6] spi: cadence_qspi: remove sram polling from flash write X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" There is no need to poll sram level before writing to flash, data going to SRAM till sram is full, after that backpressure will take over. Signed-off-by: Vikas Manocha --- drivers/spi/cadence_qspi_apb.c | 63 ++++++++++------------------------------ 1 file changed, 16 insertions(+), 47 deletions(-) diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index 32cbc23..313f6ac 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -213,66 +213,35 @@ static int cadence_qspi_apb_read_fifo_data(void *dest, return 0; } -static void cadence_qspi_apb_write_fifo_data(const void *dest_ahb_addr, - const void *src, unsigned int bytes) -{ - unsigned int temp=0; - int i; - int remaining = bytes; - unsigned int *dest_ptr = (unsigned int *)dest_ahb_addr; - unsigned int *src_ptr = (unsigned int *)src; - - while (remaining >= CQSPI_FIFO_WIDTH) { - for (i = CQSPI_FIFO_WIDTH/sizeof(src_ptr) - 1; i >= 0; i--) - writel(*(src_ptr+i), dest_ptr+i); - src_ptr += CQSPI_FIFO_WIDTH/sizeof(src_ptr); - remaining -= CQSPI_FIFO_WIDTH; - } - if (remaining) - { - /* dangling bytes */ - i = remaining/sizeof(dest_ptr); - memcpy(&temp, src_ptr+i, remaining % sizeof(dest_ptr)); - writel(temp, dest_ptr+i); - for (--i; i >= 0; i--) - writel(*(src_ptr+i), dest_ptr+i); - } - return; -} - -/* Write to SRAM FIFO with polling SRAM fill level. */ static int qpsi_write_sram_fifo_push(struct cadence_spi_platdata *plat, const void *src_addr, unsigned int num_bytes) { - const void *reg_base = plat->regbase; - void *dest_addr = plat->ahbbase; - unsigned int retry = CQSPI_REG_RETRY; - unsigned int sram_level; + int i = 0; + unsigned int *dest_addr = plat->trigger_base; unsigned int wr_bytes; - unsigned char *src = (unsigned char *)src_addr; + unsigned int *src_ptr = (unsigned int *)src_addr; int remaining = num_bytes; unsigned int page_size = plat->page_size; - unsigned int sram_threshold_words = CQSPI_REG_SRAM_THRESHOLD_WORDS; while (remaining > 0) { - retry = CQSPI_REG_RETRY; - while (retry--) { - sram_level = CQSPI_GET_WR_SRAM_LEVEL(reg_base); - if (sram_level <= sram_threshold_words) - break; - } - if (!retry) { - printf("QSPI: SRAM fill level (0x%08x) not hit lower expected level (0x%08x)", - sram_level, sram_threshold_words); - return -1; - } /* Write a page or remaining bytes. */ wr_bytes = (remaining > page_size) ? page_size : remaining; - cadence_qspi_apb_write_fifo_data(dest_addr, src, wr_bytes); - src += wr_bytes; remaining -= wr_bytes; + while (wr_bytes >= CQSPI_FIFO_WIDTH) { + for (i = 0; i < CQSPI_FIFO_WIDTH/sizeof(dest_addr); i++) + writel(*(src_ptr+i), dest_addr+i); + src_ptr += CQSPI_FIFO_WIDTH/sizeof(dest_addr); + wr_bytes -= CQSPI_FIFO_WIDTH; + } + if (wr_bytes) + { + /* dangling bytes */ + i = wr_bytes/sizeof(dest_addr); + for (i = wr_bytes/sizeof(dest_addr); i >= 0; i--) + writel(*(src_ptr+i), dest_addr+i); + } } return 0;