From patchwork Mon Jun 8 21:24:24 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Kocialkowski X-Patchwork-Id: 482014 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 51360140213 for ; Tue, 9 Jun 2015 07:25:59 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3D52B4B6F8; Mon, 8 Jun 2015 23:25:42 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id X6hVG6W8neg9; Mon, 8 Jun 2015 23:25:42 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 55D384B6AF; Mon, 8 Jun 2015 23:25:37 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 20D574B6E6 for ; Mon, 8 Jun 2015 23:25:31 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 5gdKLKIUHlhy for ; Mon, 8 Jun 2015 23:25:31 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from gagarine.paulk.fr (gagarine.paulk.fr [109.190.93.129]) by theia.denx.de (Postfix) with ESMTPS id BBFB54B6AF for ; Mon, 8 Jun 2015 23:25:29 +0200 (CEST) Received: by gagarine.paulk.fr (Postfix, from userid 65534) id 394601FE51; Mon, 8 Jun 2015 23:25:29 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on gagarine.paulk.fr X-Spam-Level: * X-Spam-Status: No, score=1.3 required=5.0 tests=RDNS_NONE autolearn=no autolearn_force=no version=3.4.0 Received: from armstrong.paulk.fr (armstrong.paulk.fr [82.233.88.171]) by gagarine.paulk.fr (Postfix) with ESMTPS id BEAB31FE64; Mon, 8 Jun 2015 23:24:40 +0200 (CEST) Received: from localhost.localdomain (unknown [192.168.0.2]) by armstrong.paulk.fr (Postfix) with ESMTP id A221137864; Mon, 8 Jun 2015 23:24:38 +0200 (CEST) From: Paul Kocialkowski To: u-boot@lists.denx.de Date: Mon, 8 Jun 2015 23:24:24 +0200 Message-Id: <1433798667-9171-7-git-send-email-contact@paulk.fr> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1433798667-9171-1-git-send-email-contact@paulk.fr> References: <1433351007-1704-2-git-send-email-contact@paulk.fr> <1433798667-9171-1-git-send-email-contact@paulk.fr> Cc: Marek Vasut , Tom Rini , =?UTF-8?q?Pali=20Roh=C3=A1r?= Subject: [U-Boot] [PATCH v2 6/8] omap3: Definitions for SYS_BOOT-based fallback boot device selection X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This introduces code to read the value of the SYS_BOOT pins on the OMAP3, as well as the memory-preferred scheme for the interpretation of each value. Signed-off-by: Paul Kocialkowski --- arch/arm/cpu/armv7/omap3/Makefile | 1 + arch/arm/cpu/armv7/omap3/boot.c | 58 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 59 insertions(+) create mode 100644 arch/arm/cpu/armv7/omap3/boot.c diff --git a/arch/arm/cpu/armv7/omap3/Makefile b/arch/arm/cpu/armv7/omap3/Makefile index cf86046..b2fce96 100644 --- a/arch/arm/cpu/armv7/omap3/Makefile +++ b/arch/arm/cpu/armv7/omap3/Makefile @@ -8,6 +8,7 @@ obj-y := lowlevel_init.o obj-y += board.o +obj-y += boot.o obj-y += clock.o obj-y += sys_info.o ifdef CONFIG_SPL_BUILD diff --git a/arch/arm/cpu/armv7/omap3/boot.c b/arch/arm/cpu/armv7/omap3/boot.c new file mode 100644 index 0000000..66576b2 --- /dev/null +++ b/arch/arm/cpu/armv7/omap3/boot.c @@ -0,0 +1,58 @@ +/* + * OMAP3 boot + * + * Copyright (C) 2015 Paul Kocialkowski + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +static u32 boot_devices[] = { + BOOT_DEVICE_ONENAND, + BOOT_DEVICE_NAND, + BOOT_DEVICE_ONENAND, + BOOT_DEVICE_MMC2, + BOOT_DEVICE_ONENAND, + BOOT_DEVICE_MMC2, + BOOT_DEVICE_MMC1, + BOOT_DEVICE_XIP, + BOOT_DEVICE_XIPWAIT, + BOOT_DEVICE_MMC2, + BOOT_DEVICE_XIP, + BOOT_DEVICE_XIPWAIT, + BOOT_DEVICE_NAND, + BOOT_DEVICE_XIP, + BOOT_DEVICE_XIPWAIT, + BOOT_DEVICE_NAND, + BOOT_DEVICE_ONENAND, + BOOT_DEVICE_MMC2, + BOOT_DEVICE_MMC1, + BOOT_DEVICE_XIP, + BOOT_DEVICE_XIPWAIT, + BOOT_DEVICE_NAND, + BOOT_DEVICE_ONENAND, + BOOT_DEVICE_MMC2, + BOOT_DEVICE_MMC1, + BOOT_DEVICE_XIP, + BOOT_DEVICE_XIPWAIT, + BOOT_DEVICE_NAND, + BOOT_DEVICE_MMC2_2, +}; + +u32 omap_sys_boot_device(void) +{ + struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; + u32 sys_boot; + + /* Grab the first 5 bits of the status register for SYS_BOOT. */ + sys_boot = readl(&ctrl_base->status) & ((1 << 5) - 1); + + if (sys_boot >= (sizeof(boot_devices) / sizeof(u32))) + return BOOT_DEVICE_NONE; + + return boot_devices[sys_boot]; +}