From patchwork Thu May 28 09:23:57 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prabhakar Kushwaha X-Patchwork-Id: 478605 X-Patchwork-Delegate: yorksun@freescale.com From: prabhakar at freescale.com (Prabhakar Kushwaha) Date: Thu, 28 May 2015 14:53:57 +0530 Subject: [U-Boot] [PATCH 04/22][v2] armv8/ls2085aqds: Add support of SerDes protocol 0x49 In-Reply-To: <1432805055-1244-1-git-send-email-prabhakar@freescale.com> References: <1432805055-1244-1-git-send-email-prabhakar@freescale.com> Message-ID: <1432805055-1244-4-git-send-email-prabhakar@freescale.com> List-Id: U-Boot discussion SerDes Protocol 0x49 enables 4 SGMII, PEX4, SATA1 and SATA2. Add support of 0x49 SerDes protocol to enable 4SGMII on slot4 of ls2085aqds platform. Signed-off-by: Prabhakar Kushwaha --- Changes for v2: Incorporated York's commets - updated subject and description board/freescale/ls2085aqds/eth.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/board/freescale/ls2085aqds/eth.c b/board/freescale/ls2085aqds/eth.c index 5ba4770..f32ace2 100644 --- a/board/freescale/ls2085aqds/eth.c +++ b/board/freescale/ls2085aqds/eth.c @@ -210,6 +210,7 @@ static void initialize_dpmac_to_slot(void) switch (serdes2_prtcl) { case 0x07: case 0x08: + case 0x49: printf("qds: WRIOP: Supported SerDes Protocol 0x%02x\n", serdes2_prtcl); lane_to_slot_fsm2[0] = EMI1_SLOT4; @@ -247,6 +248,7 @@ void ls2085a_handle_phy_interface_sgmii(int dpmac_id) switch (serdes2_prtcl) { case 0x07: case 0x08: + case 0x49: lane = serdes_get_first_lane(FSL_SRDS_2, SGMII9 + (dpmac_id - 9)); slot = lane_to_slot_fsm2[lane];