From patchwork Wed May 13 13:45:49 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 471918 X-Patchwork-Delegate: twarren@nvidia.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 64C29140D16 for ; Wed, 13 May 2015 23:54:41 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 1C8504B7F0; Wed, 13 May 2015 15:54:01 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id gHAKzmpnzq07; Wed, 13 May 2015 15:54:01 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id BEE004B873; Wed, 13 May 2015 15:53:27 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7C8F84B7DB for ; Wed, 13 May 2015 15:52:50 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id jv4_25ROsozq for ; Wed, 13 May 2015 15:52:50 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-yk0-f201.google.com (mail-yk0-f201.google.com [209.85.160.201]) by theia.denx.de (Postfix) with ESMTPS id 81E3C4B7E5 for ; Wed, 13 May 2015 15:52:45 +0200 (CEST) Received: by ykq19 with SMTP id 19so1199267ykq.1 for ; Wed, 13 May 2015 06:52:44 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=6XsFL8tS8c8ZhOpdgJKRmy/r5+cL5vnGVQ3r7z0SHY4=; b=D+GX0MDrhq+9yrQM6Qt+LVerz+1VKvD01Jnor2+JbOOB74oMBFCMDzZBAG/kgNXy4E SYqJBbXT4WyjwysxJzNKtSzo70U/FxY3qS3ccC7wTRhmY3c/532j6aiwowq8SOLB5C3Q ZYGcO3plnlkxGqmjIPNwXTmnV2XCM1rJ5bCxtTG3ReyEillnHey7c/6QS8Yo1dQbL2b6 6eZd3kg9XcJfnHc74KJ68KAIGw69To003qUTnsZj2N3YUBEbk1xoaZ3lILk2fRrU2hHS WS7f+UheBbIzrFPvi12cANVUx4Db1QHai+2GWuXbOhFuUYPm3Dja0Za6dX6U7JAVkLX6 BXbg== X-Gm-Message-State: ALoCoQmJG/yW2CAkjcDK5At+bUbKwVKXnBCj7or3NDR8iwGIfjKpWLeeglRxwrA8Xo5OYQsWGMJ+ X-Received: by 10.236.2.225 with SMTP id 61mr33546171yhf.23.1431525164033; Wed, 13 May 2015 06:52:44 -0700 (PDT) Received: from corpmail-nozzle1-1.hot.corp.google.com ([100.108.1.104]) by gmr-mx.google.com with ESMTPS id l36si1088003yhb.1.2015.05.13.06.52.43 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 13 May 2015 06:52:44 -0700 (PDT) Received: from kaki.bld.corp.google.com ([172.29.216.32]) by corpmail-nozzle1-1.hot.corp.google.com with ESMTP id Cs0dtcEf.1; Wed, 13 May 2015 06:52:43 -0700 Received: by kaki.bld.corp.google.com (Postfix, from userid 121222) id 58733220DDE; Wed, 13 May 2015 07:52:43 -0600 (MDT) From: Simon Glass To: U-Boot Mailing List Date: Wed, 13 May 2015 07:45:49 -0600 Message-Id: <1431524760-27290-6-git-send-email-sjg@chromium.org> X-Mailer: git-send-email 2.2.0.rc0.207.ga3a616c In-Reply-To: <1431524760-27290-1-git-send-email-sjg@chromium.org> References: <1431524760-27290-1-git-send-email-sjg@chromium.org> Cc: Stephen Warren , Tom Warren Subject: [U-Boot] [PATCH v2 05/16] tegra: clock: Support enabling external clocks X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add a simple function to enable external clocks. Signed-off-by: Simon Glass --- Changes in v2: None arch/arm/include/asm/arch-tegra/clock.h | 8 ++++++++ arch/arm/mach-tegra/clock.c | 17 +++++++++++++++++ 2 files changed, 25 insertions(+) diff --git a/arch/arm/include/asm/arch-tegra/clock.h b/arch/arm/include/asm/arch-tegra/clock.h index 04011ae..f9dd3c8 100644 --- a/arch/arm/include/asm/arch-tegra/clock.h +++ b/arch/arm/include/asm/arch-tegra/clock.h @@ -336,4 +336,12 @@ void arch_timer_init(void); void tegra30_set_up_pllp(void); +/** + * Enable output clock for external peripherals + * + * @param clk_id Clock ID to output (1, 2 or 3) + * @return 0 if OK. -ve on error + */ +int clock_external_output(int clk_id); + #endif /* _TEGRA_CLOCK_H_ */ diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c index cdd5438..5908260 100644 --- a/arch/arm/mach-tegra/clock.c +++ b/arch/arm/mach-tegra/clock.c @@ -17,11 +17,13 @@ /* Tegra SoC common clock control functions */ #include +#include #include #include #include #include #include +#include #include #include #include @@ -702,3 +704,18 @@ void tegra30_set_up_pllp(void) set_avp_clock_source(SCLK_SOURCE_PLLP_OUT4); } + +int clock_external_output(int clk_id) +{ + struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE; + + if (clk_id >= 1 && clk_id <= 3) { + setbits_le32(&pmc->pmc_clk_out_cntrl, + 1 << (2 + (clk_id - 1) * 8)); + } else { + printf("%s: Unknown output clock id %d\n", __func__, clk_id); + return -EINVAL; + } + + return 0; +}