From patchwork Mon Apr 27 22:48:19 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 465287 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id E54F0140083 for ; Tue, 28 Apr 2015 08:59:14 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9813F4BBE2; Tue, 28 Apr 2015 00:59:11 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id IYQq37pmLCVR; Tue, 28 Apr 2015 00:59:11 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AFB3B4BBE5; Tue, 28 Apr 2015 00:59:06 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 766C74BA78 for ; Tue, 28 Apr 2015 00:59:02 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id JWhAP1GcYgih for ; Tue, 28 Apr 2015 00:59:02 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pd0-f202.google.com (mail-pd0-f202.google.com [209.85.192.202]) by theia.denx.de (Postfix) with ESMTPS id 0830C4BA71 for ; Tue, 28 Apr 2015 00:58:57 +0200 (CEST) Received: by pdev10 with SMTP id v10so9715753pde.1 for ; Mon, 27 Apr 2015 15:58:56 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=B5HfwIatO+oHiLKszrJer9E0jBFcEBXfJKklTYwWVOk=; b=ClWRwNk+2IYKnAUVkuL51TgavD1ld56iyVJ6eE8sHTdjgfkaOX2GxK1VGr53DR59D1 T9P6bChDBuxCKXLz1Ea4FmBmgkxBMS8AMjFnFWJSZHe3nLZkoq8vqgBraxCmDwUw3FWU pS9uEvLt2EziTZ9NNlk1EWkDJBuorXZMQF4URsdc9NTAllUuh17ZKErjRPo6K/APcqxy 9i87+czGjhBjf1iAZYA/x89gYTIy3OV7Kz3wVU0LXp+4YYtG8aNei1jPERlWxTQP4ZtQ JoLIgFhK/FB+QabVlaQ0HkAyvllTGqPsm6d9NiU3jBJ4fGTLfporEyrec5pU4sWY0Z9i 2n0w== X-Gm-Message-State: ALoCoQnBx/P0RBz14ytJ2xMgVH7w5cEGmP34QWo/AP89aS9LTznQpTvNoQKFb9NKvFYzxjYuG5CE X-Received: by 10.66.101.6 with SMTP id fc6mr23729561pab.36.1430175536193; Mon, 27 Apr 2015 15:58:56 -0700 (PDT) Received: from corpmail-nozzle1-1.hot.corp.google.com ([100.108.1.104]) by gmr-mx.google.com with ESMTPS id l36si1190318yhb.1.2015.04.27.15.58.55 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 27 Apr 2015 15:58:56 -0700 (PDT) Received: from kaki.bld.corp.google.com ([172.29.216.32]) by corpmail-nozzle1-1.hot.corp.google.com with ESMTP id xGOXI2OW.1; Mon, 27 Apr 2015 15:58:56 -0700 Received: by kaki.bld.corp.google.com (Postfix, from userid 121222) id 4FABF2211D1; Mon, 27 Apr 2015 16:49:10 -0600 (MDT) From: Simon Glass To: U-Boot Mailing List Date: Mon, 27 Apr 2015 16:48:19 -0600 Message-Id: <1430174911-27538-17-git-send-email-sjg@chromium.org> X-Mailer: git-send-email 2.2.0.rc0.207.ga3a616c In-Reply-To: <1430174911-27538-1-git-send-email-sjg@chromium.org> References: <1430174911-27538-1-git-send-email-sjg@chromium.org> Cc: Graeme Russ , Tom Rini , Thomas Beaman Subject: [U-Boot] [PATCH 16/20] x86: Add functions to set and clear bits on MSRs X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Since we do these sorts of operations a lot, it is useful to have a simpler API, similar to clrsetbits_le32(). Signed-off-by: Simon Glass --- arch/x86/include/asm/msr.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h index 1955a75..5349519 100644 --- a/arch/x86/include/asm/msr.h +++ b/arch/x86/include/asm/msr.h @@ -128,6 +128,25 @@ static inline void wrmsr(unsigned msr, unsigned low, unsigned high) #define wrmsrl(msr, val) \ native_write_msr((msr), (u32)((u64)(val)), (u32)((u64)(val) >> 32)) +static inline void msr_clrsetbits_64(unsigned msr, u64 clear, u64 set) +{ + u64 val; + + val = native_read_msr(msr); + val &= ~clear; + val |= set; + wrmsrl(msr, val); +} + +static inline void msr_setbits_64(unsigned msr, u64 set) +{ + u64 val; + + val = native_read_msr(msr); + val |= set; + wrmsrl(msr, val); +} + /* rdmsr with exception handling */ #define rdmsr_safe(msr, p1, p2) \ ({ \