From patchwork Sun Apr 26 18:52:37 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hans de Goede X-Patchwork-Id: 464725 X-Patchwork-Delegate: hdegoede@redhat.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 5A06114007D for ; Mon, 27 Apr 2015 04:54:58 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 1FDDC4B985; Sun, 26 Apr 2015 20:54:56 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id x5W6i67X88ML; Sun, 26 Apr 2015 20:54:55 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 80F154B981; Sun, 26 Apr 2015 20:54:55 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 137294B981 for ; Sun, 26 Apr 2015 20:54:52 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id v0bS5u3ZoX5A for ; Sun, 26 Apr 2015 20:54:51 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) by theia.denx.de (Postfix) with ESMTPS id 7F1EF4B980 for ; Sun, 26 Apr 2015 20:54:47 +0200 (CEST) Received: from int-mx13.intmail.prod.int.phx2.redhat.com (int-mx13.intmail.prod.int.phx2.redhat.com [10.5.11.26]) by mx1.redhat.com (Postfix) with ESMTPS id 7A0672BCD65; Sun, 26 Apr 2015 18:54:45 +0000 (UTC) Received: from localhost.localdomain.com (vpn1-5-95.ams2.redhat.com [10.36.5.95]) by int-mx13.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id t3QIshBR004060; Sun, 26 Apr 2015 14:54:44 -0400 From: Hans de Goede To: Ian Campbell Date: Sun, 26 Apr 2015 20:52:37 +0200 Message-Id: <1430074357-31590-1-git-send-email-hdegoede@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.26 Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH v2 08/10] sunxi: Add basic A33 basic support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Vishnu Patekar Enable full support for the A33 SoC including display, otg-usb, etc. Signed-off-by: Vishnu Patekar Signed-off-by: Hans de Goede Acked-by: Ian Campbell --- Changes in v2: -Add a comment to explain the 0 write to the usb CSR register on A33 --- arch/arm/cpu/armv7/sunxi/Makefile | 4 ++++ arch/arm/cpu/armv7/sunxi/board.c | 8 +++++--- arch/arm/cpu/armv7/sunxi/cpu_info.c | 2 ++ arch/arm/cpu/armv7/sunxi/rsb.c | 2 +- arch/arm/cpu/armv7/sunxi/usbc.c | 9 +++++++++ board/sunxi/Kconfig | 19 ++++++++++++++----- board/sunxi/board.c | 4 ++-- drivers/power/Kconfig | 4 ++-- drivers/usb/musb-new/musb_regs.h | 5 +++++ drivers/video/sunxi_display.c | 3 +++ include/configs/sunxi-common.h | 3 ++- 11 files changed, 49 insertions(+), 14 deletions(-) diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile index b2e5e5d..b299635 100644 --- a/arch/arm/cpu/armv7/sunxi/Makefile +++ b/arch/arm/cpu/armv7/sunxi/Makefile @@ -16,15 +16,18 @@ obj-y += pinmux.o obj-y += usbc.o obj-$(CONFIG_MACH_SUN6I) += prcm.o obj-$(CONFIG_MACH_SUN8I_A23) += prcm.o +obj-$(CONFIG_MACH_SUN8I_A33) += prcm.o obj-$(CONFIG_MACH_SUN9I) += prcm.o obj-$(CONFIG_MACH_SUN6I) += p2wi.o obj-$(CONFIG_MACH_SUN8I_A23) += rsb.o +obj-$(CONFIG_MACH_SUN8I_A33) += rsb.o obj-$(CONFIG_MACH_SUN9I) += rsb.o obj-$(CONFIG_MACH_SUN4I) += clock_sun4i.o obj-$(CONFIG_MACH_SUN5I) += clock_sun4i.o obj-$(CONFIG_MACH_SUN6I) += clock_sun6i.o obj-$(CONFIG_MACH_SUN7I) += clock_sun4i.o obj-$(CONFIG_MACH_SUN8I_A23) += clock_sun6i.o +obj-$(CONFIG_MACH_SUN8I_A33) += clock_sun6i.o obj-$(CONFIG_MACH_SUN9I) += clock_sun9i.o ifndef CONFIG_SPL_BUILD @@ -39,5 +42,6 @@ obj-$(CONFIG_MACH_SUN5I) += dram_sun4i.o obj-$(CONFIG_MACH_SUN6I) += dram_sun6i.o obj-$(CONFIG_MACH_SUN7I) += dram_sun4i.o obj-$(CONFIG_MACH_SUN8I_A23) += dram_sun8i_a23.o +obj-$(CONFIG_MACH_SUN8I_A33) += dram_sun8i_a33.o obj-y += fel_utils.o endif diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c index 610d889..7e8f6ef 100644 --- a/arch/arm/cpu/armv7/sunxi/board.c +++ b/arch/arm/cpu/armv7/sunxi/board.c @@ -46,7 +46,7 @@ static int gpio_init(void) sunxi_gpio_set_cfgpin(SUNXI_GPB(22), SUNXI_GPIO_INPUT); sunxi_gpio_set_cfgpin(SUNXI_GPB(23), SUNXI_GPIO_INPUT); #endif -#if defined(CONFIG_MACH_SUN8I_A23) +#if defined(CONFIG_MACH_SUN8I_A23) || defined(CONFIG_MACH_SUN8I_A33) sunxi_gpio_set_cfgpin(SUNXI_GPF(2), SUN8I_GPF_UART0_TX); sunxi_gpio_set_cfgpin(SUNXI_GPF(4), SUN8I_GPF_UART0_RX); #else @@ -70,7 +70,8 @@ static int gpio_init(void) sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1); sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG_UART1); sunxi_gpio_set_pull(SUNXI_GPG(4), SUNXI_GPIO_PULL_UP); -#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I_A23) +#elif CONFIG_CONS_INDEX == 5 && \ + (defined(CONFIG_MACH_SUN8I_A23) || defined(CONFIG_MACH_SUN8I_A33)) sunxi_gpio_set_cfgpin(SUNXI_GPL(2), SUN8I_GPL_R_UART); sunxi_gpio_set_cfgpin(SUNXI_GPL(3), SUN8I_GPL_R_UART); sunxi_gpio_set_pull(SUNXI_GPL(3), SUNXI_GPIO_PULL_UP); @@ -96,7 +97,8 @@ void s_init(void) #endif #if defined CONFIG_MACH_SUN6I || \ defined CONFIG_MACH_SUN7I || \ - defined CONFIG_MACH_SUN8I_A23 + defined CONFIG_MACH_SUN8I_A23 || \ + defined CONFIG_MACH_SUN8I_A33 /* Enable SMP mode for CPU0, by setting bit 6 of Auxiliary Ctl reg */ asm volatile( "mrc p15, 0, r0, c1, c0, 1\n" diff --git a/arch/arm/cpu/armv7/sunxi/cpu_info.c b/arch/arm/cpu/armv7/sunxi/cpu_info.c index 77435f3..30ec4ac 100644 --- a/arch/arm/cpu/armv7/sunxi/cpu_info.c +++ b/arch/arm/cpu/armv7/sunxi/cpu_info.c @@ -66,6 +66,8 @@ int print_cpuinfo(void) puts("CPU: Allwinner A20 (SUN7I)\n"); #elif defined CONFIG_MACH_SUN8I_A23 puts("CPU: Allwinner A23 (SUN8I)\n"); +#elif defined CONFIG_MACH_SUN8I_A33 + puts("CPU: Allwinner A33 (SUN8I)\n"); #else #warning Please update cpu_info.c with correct CPU information puts("CPU: SUNXI Family\n"); diff --git a/arch/arm/cpu/armv7/sunxi/rsb.c b/arch/arm/cpu/armv7/sunxi/rsb.c index d8d4957..076592b 100644 --- a/arch/arm/cpu/armv7/sunxi/rsb.c +++ b/arch/arm/cpu/armv7/sunxi/rsb.c @@ -20,7 +20,7 @@ static int rsb_set_device_mode(void); static void rsb_cfg_io(void) { -#if defined CONFIG_MACH_SUN8I_A23 +#if defined CONFIG_MACH_SUN8I_A23 || defined CONFIG_MACH_SUN8I_A33 sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN8I_GPL_R_RSB); sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN8I_GPL_R_RSB); sunxi_gpio_set_pull(SUNXI_GPL(0), 1); diff --git a/arch/arm/cpu/armv7/sunxi/usbc.c b/arch/arm/cpu/armv7/sunxi/usbc.c index 7d55e41..7b883fb 100644 --- a/arch/arm/cpu/armv7/sunxi/usbc.c +++ b/arch/arm/cpu/armv7/sunxi/usbc.c @@ -28,7 +28,11 @@ #endif #define SUNXI_USB_PMU_IRQ_ENABLE 0x800 +#ifdef CONFIG_MACH_SUN8I_A33 +#define SUNXI_USB_CSR 0x410 +#else #define SUNXI_USB_CSR 0x404 +#endif #define SUNXI_USB_PASSBY_EN 1 #define SUNXI_EHCI_AHB_ICHR8_EN (1 << 10) @@ -103,6 +107,11 @@ static void usb_phy_write(struct sunxi_usbc_hcd *sunxi_usbc, int addr, int j = 0, usbc_bit = 0; void *dest = sunxi_usbc_get_io_base(0) + SUNXI_USB_CSR; +#ifdef CONFIG_MACH_SUN8I_A33 + /* CSR needs to be explicitly initialized to 0 on A33 */ + writel(0, dest); +#endif + usbc_bit = 1 << (sunxi_usbc->id * 2); for (j = 0; j < len; j++) { /* set the bit address to be written */ diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 5024733..8dd3c37 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -52,11 +52,17 @@ config MACH_SUN8I_A23 select SUNXI_GEN_SUN6I select SUPPORT_SPL +config MACH_SUN8I_A33 + bool "sun8i (Allwinner A33)" + select CPU_V7 + select SUNXI_GEN_SUN6I + select SUPPORT_SPL + endchoice config DRAM_CLK int "sunxi dram clock speed" - default 312 if MACH_SUN6I || MACH_SUN8I_A23 + default 312 if MACH_SUN6I || MACH_SUN8I_A23 || MACH_SUN8I_A33 default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I ---help--- Set the dram clock speed, valid range 240 - 480, must be a multiple @@ -73,7 +79,8 @@ endif config DRAM_ZQ int "sunxi dram zq value" - default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I_A23 + default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I + default 123 if MACH_SUN8I_A23 || MACH_SUN8I_A33 default 127 if MACH_SUN7I ---help--- Set the dram zq value. @@ -156,7 +163,7 @@ endif config SYS_CLK_FREQ default 912000000 if MACH_SUN7I default 1008000000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I - default 1008000000 if MACH_SUN8I_A23 + default 1008000000 if MACH_SUN8I_A23 || MACH_SUN8I_A33 config SYS_CONFIG_NAME default "sun4i" if MACH_SUN4I @@ -164,6 +171,7 @@ config SYS_CONFIG_NAME default "sun6i" if MACH_SUN6I default "sun7i" if MACH_SUN7I default "sun8i" if MACH_SUN8I_A23 + default "sun8i" if MACH_SUN8I_A33 config SYS_BOARD default "sunxi" @@ -339,7 +347,7 @@ config VIDEO config VIDEO_HDMI boolean "HDMI output support" - depends on VIDEO && !MACH_SUN8I_A23 + depends on VIDEO && !MACH_SUN8I_A23 && !MACH_SUN8I_A33 default y ---help--- Say Y here to add support for outputting video over HDMI. @@ -353,7 +361,8 @@ config VIDEO_VGA config VIDEO_VGA_VIA_LCD boolean "VGA via LCD controller support" - depends on VIDEO && (MACH_SUN5I || MACH_SUN6I || MACH_SUN8I_A23) + depends on VIDEO + depends on MACH_SUN5I || MACH_SUN6I || MACH_SUN8I_A23 || MACH_SUN8I_A33 default n ---help--- Say Y here to add support for external DACs connected to the parallel diff --git a/board/sunxi/board.c b/board/sunxi/board.c index dee2621..e0fec57 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -116,7 +116,7 @@ static void mmc_pinmux_setup(int sdc) sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); sunxi_gpio_set_drv(pin, 2); } -#elif defined(CONFIG_MACH_SUN8I_A23) +#elif defined(CONFIG_MACH_SUN8I_A23) || defined(CONFIG_MACH_SUN8I_A33) if (pins == SUNXI_GPIO_D) { /* SDC1: PD2-PD7 */ for (pin = SUNXI_GPD(2); pin <= SUNXI_GPD(7); pin++) { @@ -181,7 +181,7 @@ static void mmc_pinmux_setup(int sdc) sunxi_gpio_set_pull(SUNXI_GPC(24), SUNXI_GPIO_PULL_UP); sunxi_gpio_set_drv(SUNXI_GPC(24), 2); } -#elif defined(CONFIG_MACH_SUN8I_A23) +#elif defined(CONFIG_MACH_SUN8I_A23) || defined(CONFIG_MACH_SUN8I_A33) /* SDC2: PC5-PC6, PC8-PC16 */ for (pin = SUNXI_GPC(5); pin <= SUNXI_GPC(6); pin++) { sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2); diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig index 39051e4..02ea6c1 100644 --- a/drivers/power/Kconfig +++ b/drivers/power/Kconfig @@ -1,6 +1,6 @@ config AXP221_POWER boolean "axp221 / axp223 pmic support" - depends on MACH_SUN6I || MACH_SUN8I_A23 + depends on MACH_SUN6I || MACH_SUN8I_A23 || MACH_SUN8I_A33 default y ---help--- Say y here to enable support for the axp221 / axp223 pmic found on most @@ -47,7 +47,7 @@ config AXP221_ALDO2_VOLT int "axp221 aldo2 voltage" depends on AXP221_POWER default 0 if MACH_SUN6I - default 2500 if MACH_SUN8I_A23 + default 2500 if MACH_SUN8I_A23 || MACH_SUN8I_A33 ---help--- Set the voltage (mV) to program the axp221 aldo2 at, set to 0 to disable aldo2. On sun6i (A31) boards this is typically unused and diff --git a/drivers/usb/musb-new/musb_regs.h b/drivers/usb/musb-new/musb_regs.h index 27e4ed4..90288c4 100644 --- a/drivers/usb/musb-new/musb_regs.h +++ b/drivers/usb/musb-new/musb_regs.h @@ -458,8 +458,13 @@ static inline u8 musb_read_ulpi_buscontrol(void __iomem *mbase) static inline u8 musb_read_configdata(void __iomem *mbase) { +#ifdef CONFIG_MACH_SUN8I_A33 + /* allwinner saves a reg, and we need to hardcode this */ + return 0xde; +#else musb_writeb(mbase, MUSB_INDEX, 0); return musb_readb(mbase, 0x10 + MUSB_CONFIGDATA); +#endif } static inline u16 musb_read_hwvers(void __iomem *mbase) diff --git a/drivers/video/sunxi_display.c b/drivers/video/sunxi_display.c index 5073329..0fca057 100644 --- a/drivers/video/sunxi_display.c +++ b/drivers/video/sunxi_display.c @@ -947,6 +947,9 @@ static void sunxi_drc_init(void) (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; /* On sun6i the drc must be clocked even when in pass-through mode */ +#ifdef CONFIG_MACH_SUN8I_A33 + setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_SAT); +#endif setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_DRC0); clock_set_de_mod_clock(&ccm->iep_drc0_clk_cfg, 300000000); #endif diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 4a8c452..9f10e76 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -241,7 +241,8 @@ extern int soft_i2c_gpio_scl; #endif #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I) #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200" -#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I_A23) +#elif CONFIG_CONS_INDEX == 5 && \ + (defined(CONFIG_MACH_SUN8I_A23) || defined(CONFIG_MACH_SUN8I_A33)) #define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200" #else #error Unsupported console port nr. Please fix stdout-path in sunxi-common.h.