From patchwork Wed Apr 1 15:15:05 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergey Temerkhanov X-Patchwork-Id: 457278 X-Patchwork-Delegate: albert.aribaud@free.fr Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 5AFAB1400A0 for ; Thu, 2 Apr 2015 02:14:13 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="verification failed; unprotected key" header.d=gmail.com header.i=@gmail.com header.b=RHSmtttz; dkim-adsp=none (unprotected policy); dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 09B2DA743B; Wed, 1 Apr 2015 17:14:09 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 40q2cAEbKWsl; Wed, 1 Apr 2015 17:14:08 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 0D91BA7433; Wed, 1 Apr 2015 17:14:04 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 83FF34B62A for ; Wed, 1 Apr 2015 17:13:59 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 1DJiray9Iv5D for ; Wed, 1 Apr 2015 17:13:59 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-lb0-f182.google.com (mail-lb0-f182.google.com [209.85.217.182]) by theia.denx.de (Postfix) with ESMTPS id 3D8B94B624 for ; Wed, 1 Apr 2015 17:13:55 +0200 (CEST) Received: by lboc7 with SMTP id c7so38644379lbo.1 for ; Wed, 01 Apr 2015 08:13:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=4iMKrcDH1BiNlw3zfiyqGf543dqfvgAxu2zdjRx9400=; b=RHSmtttzJs+Gi/5NAScZsE14YamKOqTB4I32GSbU4w7M3Xu36vm7wUbSriFBAsxURb 7lYBpKesd8yaXryCRtsbza1RPksnqNH8qBOGn+HbW04KnzIoFbT1DG1YBg/W9kN6No06 x4AAo+MKIPeBgIgWTClftgNmvDOLq0OB3mvMw7sLFC503E2u9k3PHMIsuAxlMf2Cw008 5/asAUTWSBAGtqclbt7XTnUrwmju1aneHS+nYnLxy/HyG0Di9fPn6aomuMHWcn5c5I/k H7tV7ASiMSYya1BsqeeyL6XEXeWSJUIkseYxgRO5mrB31B8ogCls5HCji6Sjek9FLAg7 62pg== X-Received: by 10.112.90.201 with SMTP id by9mr35374481lbb.30.1427901235454; Wed, 01 Apr 2015 08:13:55 -0700 (PDT) Received: from snickers.office.auriga.msk ([81.19.133.99]) by mx.google.com with ESMTPSA id kv10sm478236lac.23.2015.04.01.08.13.53 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 01 Apr 2015 08:13:54 -0700 (PDT) From: Sergey Temerkhanov To: u-boot@lists.denx.de, albert.u.boot@aribaud.net Date: Wed, 1 Apr 2015 18:15:05 +0300 Message-Id: <1427901306-3020-3-git-send-email-s.temerkhanov@gmail.com> X-Mailer: git-send-email 2.2.0 In-Reply-To: <1427901306-3020-1-git-send-email-s.temerkhanov@gmail.com> References: <1427901306-3020-1-git-send-email-s.temerkhanov@gmail.com> Cc: Radha Mohan Chintakuntla Subject: [U-Boot] [PATCH 2/3] armv8:Add SMC calls infrastructure X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This commit adds functions issuing calls to firmware. This allows to use services such as PSCI provided by firmware, e.g. ATF Signed-off-by: Sergey Temerkhanov Signed-off-by: Radha Mohan Chintakuntla --- arch/arm/cpu/armv8/Makefile | 1 + arch/arm/cpu/armv8/fwcall.c | 88 +++++++++++++++++++++++++++++++++++++++++++ arch/arm/include/asm/system.h | 8 ++++ 3 files changed, 97 insertions(+) create mode 100644 arch/arm/cpu/armv8/fwcall.c diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile index dee5e25..208d012 100644 --- a/arch/arm/cpu/armv8/Makefile +++ b/arch/arm/cpu/armv8/Makefile @@ -14,6 +14,7 @@ obj-y += exceptions.o obj-y += cache.o obj-y += tlb.o obj-y += transition.o +obj-y += fwcall.o obj-$(CONFIG_FSL_LSCH3) += fsl-lsch3/ obj-$(CONFIG_TARGET_XILINX_ZYNQMP) += zynqmp/ diff --git a/arch/arm/cpu/armv8/fwcall.c b/arch/arm/cpu/armv8/fwcall.c new file mode 100644 index 0000000..094a0c7 --- /dev/null +++ b/arch/arm/cpu/armv8/fwcall.c @@ -0,0 +1,88 @@ +/** @file +# +# Copyright (c) 2014, Cavium Inc. All rights reserved.
+# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD +# License which accompanies this distribution. The full text of the license +# may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR +# IMPLIED. +# +#**/ + +#include +#include +#include +#include +#include + +#define __asmeq(x, y) ".ifnc " x "," y " ; .err ; .endif\n\t" + +/* + * void hvc_call(arg0, arg1...arg7) + * + * issue the hypervisor call + * + * x0~x7: argument list + */ +void hvc_call(struct pt_regs *args) +{ + asm volatile( + "ldr x0, %0\n" + "ldr x1, %1\n" + "ldr x2, %2\n" + "ldr x3, %3\n" + "ldr x4, %4\n" + "ldr x5, %5\n" + "ldr x6, %6\n" + "ldr x7, %7\n" + "hvc #0\n" + "str x0, %0\n" + "str x1, %1\n" + "str x2, %2\n" + "str x3, %3\n" + : "+m" (args->regs[0]), "+m" (args->regs[1]), + "+m" (args->regs[2]), "+m" (args->regs[3]) + : "m" (args->regs[0]), "m" (args->regs[1]), + "m" (args->regs[2]), "m" (args->regs[3]), + "m" (args->regs[4]), "m" (args->regs[5]), + "m" (args->regs[6]), "m" (args->regs[7]) + : "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7"); +} + +/* + * void smc_call(arg0, arg1...arg7) + * + * issue the secure monitor call + * + * x0~x7: argument list + */ + +void smc_call(struct pt_regs *args) +{ + asm volatile( + "ldr x0, %0\n" + "ldr x1, %1\n" + "ldr x2, %2\n" + "ldr x3, %3\n" + "ldr x4, %4\n" + "ldr x5, %5\n" + "ldr x6, %6\n" + "ldr x7, %7\n" + "smc #0\n" + "str x0, %0\n" + "str x1, %1\n" + "str x2, %2\n" + "str x3, %3\n" + : "+m" (args->regs[0]), "+m" (args->regs[1]), + "+m" (args->regs[2]), "+m" (args->regs[3]) + : "m" (args->regs[0]), "m" (args->regs[1]), + "m" (args->regs[2]), "m" (args->regs[3]), + "m" (args->regs[4]), "m" (args->regs[5]), + "m" (args->regs[6]), "m" (args->regs[7]) + : "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7"); +} + diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index b778a6c..aac15cc 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -1,6 +1,9 @@ #ifndef __ASM_ARM_SYSTEM_H #define __ASM_ARM_SYSTEM_H +#include +#include + #ifdef CONFIG_ARM64 /* @@ -85,6 +88,11 @@ void smp_kick_all_cpus(void); void flush_l3_cache(void); +#define __asmeq(x, y) ".ifnc " x "," y " ; .err ; .endif\n\t" + +void hvc_call(struct pt_regs *args); +void smc_call(struct pt_regs *args); + #endif /* __ASSEMBLY__ */ #else /* CONFIG_ARM64 */