From patchwork Thu Mar 26 01:17:07 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 454839 X-Patchwork-Delegate: twarren@nvidia.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id BF991140082 for ; Thu, 26 Mar 2015 12:17:41 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 04E364A04C; Thu, 26 Mar 2015 02:17:40 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id STjnKHPd_UfU; Thu, 26 Mar 2015 02:17:39 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6993B4A03B; Thu, 26 Mar 2015 02:17:39 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id BA2D44A03C for ; Thu, 26 Mar 2015 02:17:31 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id QhlmUzqyMMzd for ; Thu, 26 Mar 2015 02:17:31 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mout.perfora.net (mout.perfora.net [74.208.4.197]) by theia.denx.de (Postfix) with ESMTPS id 2446D4A033 for ; Thu, 26 Mar 2015 02:17:27 +0100 (CET) Received: from localhost.net ([85.5.121.234]) by mrelay.perfora.net (mreueus002) with ESMTPSA (Nemesis) id 0M0BJq-1ZV5um2VDw-00uMWi; Thu, 26 Mar 2015 02:17:21 +0100 From: Marcel Ziswiler To: u-boot@lists.denx.de Date: Thu, 26 Mar 2015 02:17:07 +0100 Message-Id: <1427332627-13355-1-git-send-email-marcel@ziswiler.com> X-Mailer: git-send-email 1.9.3 X-Provags-ID: V03:K0:YXMQReeYIHD7hJ7rcjLCffNfe0VX/lb5w4+GGZe8yAvLFNdb8Ji VHGxSkaRNbYK+jDrZqItn3VXNi55GeBA3g+vWv3h3a1sTtu6k+o60jH51pO2EaurtL4sBOU q3BtpLGUPNOx4wl8BN+YhQ5l7zSpzkKqbWC1uGlYIGT4ki9WaXhrv4DNjmAH2QSNLRNvPD1 s/XkfR4DXjKRRCelAhqQQ== X-UI-Out-Filterresults: notjunk:1; Cc: Stephen Warren , Tom Rini , Tom Warren , Marcel Ziswiler Subject: [U-Boot] [PATCH v2] ARM: tegra: fix colibri_t20 asix reset X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Fix ASIX USB to Ethernet chip reset. Signed-off-by: Marcel Ziswiler Acked-by: Stephen Warren --- Changes in v2: - added my previously missing signed-off-by board/toradex/colibri_t20/colibri_t20.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/board/toradex/colibri_t20/colibri_t20.c b/board/toradex/colibri_t20/colibri_t20.c index 4656094..5d8bdec 100644 --- a/board/toradex/colibri_t20/colibri_t20.c +++ b/board/toradex/colibri_t20/colibri_t20.c @@ -46,7 +46,14 @@ void pin_mux_usb(void) /* VBus GPIO */ pinmux_tristate_disable(PMUX_PINGRP_DTE); - /* USB 1 aka Tegra USB port 3 VBus */ + /* Reset ASIX using LAN_RESET */ + gpio_request(GPIO_PV4, "LAN_RESET"); + gpio_direction_output(GPIO_PV4, 0); + pinmux_tristate_disable(PMUX_PINGRP_GPV); + udelay(5); + gpio_set_value(GPIO_PV4, 1); + + /* USBH_PEN: USB 1 aka Tegra USB port 3 VBus */ pinmux_tristate_disable(PMUX_PINGRP_SPIG); } #endif