From patchwork Mon Mar 23 17:43:30 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 453577 X-Patchwork-Delegate: twarren@nvidia.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 88F47140157 for ; Tue, 24 Mar 2015 04:44:01 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 263FDA7468; Mon, 23 Mar 2015 18:44:00 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id AQxjW4fN7_-t; Mon, 23 Mar 2015 18:44:00 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C12FDA7428; Mon, 23 Mar 2015 18:43:59 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E253BA7428 for ; Mon, 23 Mar 2015 18:43:57 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id QXbqZNYK16Lv for ; Mon, 23 Mar 2015 18:43:57 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mout.perfora.net (mout.perfora.net [74.208.4.196]) by theia.denx.de (Postfix) with ESMTPS id 7764BA7425 for ; Mon, 23 Mar 2015 18:43:54 +0100 (CET) Received: from localhost.localdomain ([178.197.225.139]) by mrelay.perfora.net (mreueus001) with ESMTPSA (Nemesis) id 0LjKvJ-1ZDZsH2P9D-00dNbn; Mon, 23 Mar 2015 18:43:51 +0100 From: Marcel Ziswiler To: u-boot@lists.denx.de Date: Mon, 23 Mar 2015 18:43:30 +0100 Message-Id: <1427132610-21803-1-git-send-email-marcel@ziswiler.com> X-Mailer: git-send-email 1.9.3 X-Provags-ID: V03:K0:oLgkNkRa/R0VJ7Vb9HbXuOhMMFb8bvHLs9neZ9D98tWKdCyw1PM mVits13eEGYsPhOu4vIfvpm6iLp6LrkzAZD7/Qx2V+r1I6JJP5l4MPkE5tDgrFon5HYhXDL a5jnoB2k5IrCwhZinH7OZFSZ3bs5urifu+kjEoKn+X9oDZRkGcje4kJIwqtfBcGUZfsI+3L RkG5FJctKklf1HQrGygNA== X-UI-Out-Filterresults: notjunk:1; Cc: Tom Rini , Marcel Ziswiler Subject: [U-Boot] [PATCH] ARM: tegra: fix colibri_t20 asix reset X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Fix ASIX USB to Ethernet chip reset. --- board/toradex/colibri_t20/colibri_t20.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/board/toradex/colibri_t20/colibri_t20.c b/board/toradex/colibri_t20/colibri_t20.c index 4656094..5d8bdec 100644 --- a/board/toradex/colibri_t20/colibri_t20.c +++ b/board/toradex/colibri_t20/colibri_t20.c @@ -46,7 +46,14 @@ void pin_mux_usb(void) /* VBus GPIO */ pinmux_tristate_disable(PMUX_PINGRP_DTE); - /* USB 1 aka Tegra USB port 3 VBus */ + /* Reset ASIX using LAN_RESET */ + gpio_request(GPIO_PV4, "LAN_RESET"); + gpio_direction_output(GPIO_PV4, 0); + pinmux_tristate_disable(PMUX_PINGRP_GPV); + udelay(5); + gpio_set_value(GPIO_PV4, 1); + + /* USBH_PEN: USB 1 aka Tegra USB port 3 VBus */ pinmux_tristate_disable(PMUX_PINGRP_SPIG); } #endif