From patchwork Thu Feb 26 17:26:46 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 444002 X-Patchwork-Delegate: yamada.m@jp.panasonic.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 22C6F14008F for ; Fri, 27 Feb 2015 04:28:47 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="verification failed; unprotected key" header.d=gmail.com header.i=@gmail.com header.b=c7R47lLu; dkim-adsp=unknown (unprotected policy); dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6C9154B615; Thu, 26 Feb 2015 18:28:19 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id LriW41u4MsOn; Thu, 26 Feb 2015 18:28:19 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9DC404B639; Thu, 26 Feb 2015 18:28:13 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 364CF4A046 for ; Thu, 26 Feb 2015 18:27:39 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 5N5TcFIspLTH for ; Thu, 26 Feb 2015 18:27:39 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pa0-f46.google.com (mail-pa0-f46.google.com [209.85.220.46]) by theia.denx.de (Postfix) with ESMTPS id 31C804B62A for ; Thu, 26 Feb 2015 18:27:33 +0100 (CET) Received: by padfa1 with SMTP id fa1so15537670pad.2 for ; Thu, 26 Feb 2015 09:27:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=LOgfW0Ujbp+fGbk1l3fWv8Lv9WSiszvC4yWCK+Iri5A=; b=c7R47lLuszdtXGOT/pw2cs8ZtsK+qHvhGswlKGUUav/1/mY9wWjukg+cqwr2hq6vTo o/VR1ie5nnSjQtCZt3eSBUb9vV16FF5T2BupcjOR0Y5Fr2zscaEhxuWzY3RkLkT0jHN9 T/Q5yARM8xsE4CHkQ9DtlhAbW0lmt8tDK9Vf4PRO4zG2uzE6IMPNgjxA8glUR7Ruy/h2 nDF91j58YWybCMyCruKgEYDypaaecry+GC9pKl4X5AGqAfmJLXwS5dsajij3A54g55Ap NI9Ilbj2teyMOpCgcigw0cRhuJLVU2zw/UgQiJK25mlyz9MuUKl990R2Mlv+dWIweyj8 1ViQ== X-Received: by 10.66.142.131 with SMTP id rw3mr16917668pab.34.1424971651700; Thu, 26 Feb 2015 09:27:31 -0800 (PST) Received: from oscar.sesame (112.136.111.193.er.eaccess.ne.jp. [112.136.111.193]) by mx.google.com with ESMTPSA id rr9sm1581960pbc.39.2015.02.26.09.27.29 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 26 Feb 2015 09:27:31 -0800 (PST) From: Masahiro Yamada To: u-boot@lists.denx.de Date: Fri, 27 Feb 2015 02:26:46 +0900 Message-Id: <1424971627-7874-6-git-send-email-yamada.m@jp.panasonic.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1424971627-7874-1-git-send-email-yamada.m@jp.panasonic.com> References: <1424971627-7874-1-git-send-email-yamada.m@jp.panasonic.com> Subject: [U-Boot] [PATCH v5 05/26] serial: UniPhier: use 32 bit register access X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" For PH1-Pro4, the 8 bit write access to LCR register (offset = 0x11) is not working correctly. As a side effect, it also modifies MCR register (offset = 0x10) and results in unexpected behavior. Signed-off-by: Masahiro Yamada --- Changes in v5: - Newly added Changes in v4: None Changes in v3: None Changes in v2: None drivers/serial/serial_uniphier.c | 54 +++++++++++++++++++--------------------- 1 file changed, 26 insertions(+), 28 deletions(-) diff --git a/drivers/serial/serial_uniphier.c b/drivers/serial/serial_uniphier.c index e8a1608..327e0dc 100644 --- a/drivers/serial/serial_uniphier.c +++ b/drivers/serial/serial_uniphier.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2012-2014 Panasonic Corporation + * Copyright (C) 2012-2015 Panasonic Corporation * Author: Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ @@ -13,31 +13,25 @@ #include #include -#define UART_REG(x) \ - u8 x; \ - u8 postpad_##x[3]; - /* * Note: Register map is slightly different from that of 16550. */ struct uniphier_serial { - UART_REG(rbr); /* 0x00 */ - UART_REG(ier); /* 0x04 */ - UART_REG(iir); /* 0x08 */ - UART_REG(fcr); /* 0x0c */ - u8 mcr; /* 0x10 */ - u8 lcr; - u16 __postpad; - UART_REG(lsr); /* 0x14 */ - UART_REG(msr); /* 0x18 */ - u32 __none1; - u32 __none2; - u16 dlr; - u16 __postpad2; + u32 rx; /* In: Receive buffer */ +#define tx rx /* Out: Transmit buffer */ + u32 ier; /* Interrupt Enable Register */ + u32 iir; /* In: Interrupt ID Register */ + u32 char_fcr; /* Charactor / FIFO Control Register */ + u32 lcr_mcr; /* Line/Modem Control Register */ +#define LCR_SHIFT 8 +#define LCR_MASK (0xff << (LCR_SHIFT)) + u32 lsr; /* In: Line Status Register */ + u32 msr; /* In: Modem Status Register */ + u32 __rsv0; + u32 __rsv1; + u32 dlr; /* Divisor Latch Register */ }; -#define thr rbr - struct uniphier_serial_private_data { struct uniphier_serial __iomem *membase; }; @@ -51,12 +45,16 @@ static int uniphier_serial_setbrg(struct udevice *dev, int baudrate) struct uniphier_serial __iomem *port = uniphier_serial_port(dev); const unsigned int mode_x_div = 16; unsigned int divisor; + u32 tmp; - writeb(UART_LCR_WLEN8, &port->lcr); + tmp = readl(&port->lcr_mcr); + tmp &= ~LCR_MASK; + tmp |= UART_LCR_WLEN8 << LCR_SHIFT; + writel(tmp, &port->lcr_mcr); divisor = DIV_ROUND_CLOSEST(plat->uartclk, mode_x_div * baudrate); - writew(divisor, &port->dlr); + writel(divisor, &port->dlr); return 0; } @@ -65,20 +63,20 @@ static int uniphier_serial_getc(struct udevice *dev) { struct uniphier_serial __iomem *port = uniphier_serial_port(dev); - if (!(readb(&port->lsr) & UART_LSR_DR)) + if (!(readl(&port->lsr) & UART_LSR_DR)) return -EAGAIN; - return readb(&port->rbr); + return readl(&port->rx); } static int uniphier_serial_putc(struct udevice *dev, const char c) { struct uniphier_serial __iomem *port = uniphier_serial_port(dev); - if (!(readb(&port->lsr) & UART_LSR_THRE)) + if (!(readl(&port->lsr) & UART_LSR_THRE)) return -EAGAIN; - writeb(c, &port->thr); + writel(c, &port->tx); return 0; } @@ -88,9 +86,9 @@ static int uniphier_serial_pending(struct udevice *dev, bool input) struct uniphier_serial __iomem *port = uniphier_serial_port(dev); if (input) - return readb(&port->lsr) & UART_LSR_DR; + return readl(&port->lsr) & UART_LSR_DR; else - return !(readb(&port->lsr) & UART_LSR_THRE); + return !(readl(&port->lsr) & UART_LSR_THRE); } static int uniphier_serial_probe(struct udevice *dev)