From patchwork Tue Feb 17 22:29:43 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 440734 X-Patchwork-Delegate: twarren@nvidia.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 815081401DD for ; Wed, 18 Feb 2015 09:31:33 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8DE5C4B6E3; Tue, 17 Feb 2015 23:31:09 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id HcdfcHPf_Z9Y; Tue, 17 Feb 2015 23:31:09 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 88ECC4B6E6; Tue, 17 Feb 2015 23:30:34 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A21964B654 for ; Tue, 17 Feb 2015 23:30:14 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id vl727twlNtkO for ; Tue, 17 Feb 2015 23:30:14 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-ie0-f202.google.com (mail-ie0-f202.google.com [209.85.223.202]) by theia.denx.de (Postfix) with ESMTPS id 9532D4B67C for ; Tue, 17 Feb 2015 23:30:11 +0100 (CET) Received: by iecrl12 with SMTP id rl12so12879663iec.0 for ; Tue, 17 Feb 2015 14:30:10 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=RqwrLkxBMN08w6XE0Ltrl/Ma2WcAIYb+MTGM7Z8kczM=; b=ft4GH0O06npwXM/TVCRhjAJt1USlqDz4FR5RLeWajN6mLvne+qd1Xh7ufL17/hqY1y bTexTgFKqUTPeb5d5bE58cXJKWtlSvNbFMAHqlw06V8OdECaBLAGkSqHJTSnXokH3bWL UZlfi2IIi5qJMuw6wWrXjIf9f+N98J7lWWodhjkBccfZFW0eEYnFTamBkEmN/fujDBp0 /vpouKpT0vjf6X9EAqr64Wuaodj9TGFU7S7akY17k8vbIe0JCak21OIm9JYR/ovswdjd QX4Hr/8xGY3hbaj/ge3lCwR598b9RL6E3Y0LtVerIQ4ZFlymseGNLdFOWJZUiwrHtg9V /uyg== X-Gm-Message-State: ALoCoQn85LchNSdzxAwYo1LuQwlj/0XsA+s+ACiWWLo+TovrnTB8ogEKqKmG5OBCHgAwB+aF4+0V X-Received: by 10.182.96.131 with SMTP id ds3mr1242378obb.35.1424212210264; Tue, 17 Feb 2015 14:30:10 -0800 (PST) Received: from corpmail-nozzle1-2.hot.corp.google.com ([100.108.1.103]) by gmr-mx.google.com with ESMTPS id e5si1352008qcg.1.2015.02.17.14.30.09 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Feb 2015 14:30:10 -0800 (PST) Received: from kaki.bld.corp.google.com ([172.29.216.32]) by corpmail-nozzle1-2.hot.corp.google.com with ESMTP id cNpJ9on8.1; Tue, 17 Feb 2015 14:30:10 -0800 Received: by kaki.bld.corp.google.com (Postfix, from userid 121222) id 78A1E220ECC; Tue, 17 Feb 2015 15:30:09 -0700 (MST) From: Simon Glass To: U-Boot Mailing List Date: Tue, 17 Feb 2015 15:29:43 -0700 Message-Id: <1424212195-7501-10-git-send-email-sjg@chromium.org> X-Mailer: git-send-email 2.2.0.rc0.207.ga3a616c In-Reply-To: <1424212195-7501-1-git-send-email-sjg@chromium.org> References: <1424212195-7501-1-git-send-email-sjg@chromium.org> Cc: Stephen Warren , Tom Warren Subject: [U-Boot] [PATCH 09/20] tegra: spi: Support slow SPI rates X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Use the oscillator as the source clock when we cannot achieve a low-enough speed with the peripheral clock. This happens when we request 3MHz on a SPI clock, for example. Signed-off-by: Simon Glass --- drivers/spi/tegra114_spi.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/spi/tegra114_spi.c b/drivers/spi/tegra114_spi.c index a73c6b0..1c5368b 100644 --- a/drivers/spi/tegra114_spi.c +++ b/drivers/spi/tegra114_spi.c @@ -143,6 +143,7 @@ static int tegra114_spi_probe(struct udevice *bus) { struct tegra_spi_platdata *plat = dev_get_platdata(bus); struct tegra114_spi_priv *priv = dev_get_priv(bus); + ulong rate; priv->regs = (struct spi_regs *)plat->base; @@ -150,9 +151,20 @@ static int tegra114_spi_probe(struct udevice *bus) priv->freq = plat->frequency; priv->periph_id = plat->periph_id; - /* Change SPI clock to correct frequency, PLLP_OUT0 source */ - clock_start_periph_pll(priv->periph_id, CLOCK_ID_PERIPH, - priv->freq); + /* + * Change SPI clock to correct frequency, PLLP_OUT0 source, falling + * back to the oscillator if that is too fast. + */ + rate = clock_start_periph_pll(priv->periph_id, CLOCK_ID_PERIPH, + priv->freq); + if (rate > priv->freq + 100000) { + rate = clock_start_periph_pll(priv->periph_id, CLOCK_ID_OSC, + priv->freq); + if (rate != priv->freq) { + printf("Warning: SPI '%s' requested clock %u, actual clock %lu\n", + bus->name, priv->freq, rate); + } + } setbits_le32(&priv->regs->command1, SPI_CMD1_M_S | SPI_CMD1_CS_SW_HW | (priv->mode << SPI_CMD1_MODE_SHIFT) | SPI_CMD1_CS_SW_VAL);