| Message ID | 1423212497-11970-3-git-send-email-kishon@ti.com |
|---|---|
| State | Accepted |
| Delegated to: | Łukasz Majewski |
| Headers | show |
Hi Kishon, > Enabled clocks for dwc3 controller and USB PHY present in AM43xx. > > Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> > --- > arch/arm/cpu/armv7/am33xx/clock_am43xx.c | 12 +++++++++++ > arch/arm/include/asm/arch-am33xx/cpu.h | 22 > ++++++++++++++------ > arch/arm/include/asm/arch-am33xx/hardware_am43xx.h | 4 ++++ 3 > files changed, 32 insertions(+), 6 deletions(-) > > diff --git a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c > b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c index 31188c8..252135d > 100644 --- a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c > +++ b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c > @@ -111,9 +111,21 @@ void enable_basic_clocks(void) > &cmper->emifclkctrl, > &cmper->otfaemifclkctrl, > &cmper->qspiclkctrl, > + &cmper->usb0clkctrl, > + &cmper->usbphyocp2scp0clkctrl, > + &cmper->usb1clkctrl, > + &cmper->usbphyocp2scp1clkctrl, > 0 > }; > > + setbits_le32(&cmper->usb0clkctrl, > + USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960); > + setbits_le32(&cmwkup->usbphy0clkctrl, > + USBPHY0_CLKCTRL_OPTFCLKEN_CLK32K); > + setbits_le32(&cmper->usb1clkctrl, > + USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960); > + setbits_le32(&cmwkup->usbphy1clkctrl, > + USBPHY0_CLKCTRL_OPTFCLKEN_CLK32K); > do_enable_clocks(clk_domains, clk_modules_explicit_en, 1); > > /* Select the Master osc clk as Timer2 clock source */ > diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h > b/arch/arm/include/asm/arch-am33xx/cpu.h index 8dd69b3..1caa24e 100644 > --- a/arch/arm/include/asm/arch-am33xx/cpu.h > +++ b/arch/arm/include/asm/arch-am33xx/cpu.h > @@ -224,7 +224,11 @@ struct cm_dpll { > struct cm_wkuppll { > unsigned int resv0[136]; > unsigned int wkl4wkclkctrl; /* offset 0x220 */ > - unsigned int resv1[55]; > + unsigned int resv1[7]; > + unsigned int usbphy0clkctrl; /* offset 0x240 */ > + unsigned int resv112; > + unsigned int usbphy1clkctrl; /* offset 0x248 */ > + unsigned int resv113[45]; > unsigned int wkclkstctrl; /* offset 0x300 */ > unsigned int resv2[15]; > unsigned int wkup_i2c0ctrl; /* offset 0x340 */ > @@ -275,7 +279,7 @@ struct cm_wkuppll { > unsigned int divm2dplldisp; /* offset 0x630 */ > }; > > -/* > +/*get_sys_clk_freq This comment doesn't comply with coding style. It should be /* * get_sys_clk_freq * En ... */ > * Encapsulating peripheral functional clocks > * pll registers > */ > @@ -283,7 +287,7 @@ struct cm_perpll { > unsigned int l3clkstctrl; /* offset 0x00 */ > unsigned int resv0[7]; > unsigned int l3clkctrl; /* Offset 0x20 */ > - unsigned int resv1[7]; > + unsigned int resv112[7]; > unsigned int l3instrclkctrl; /* offset 0x40 */ > unsigned int resv2[3]; > unsigned int ocmcramclkctrl; /* offset 0x50 */ > @@ -310,7 +314,9 @@ struct cm_perpll { > unsigned int qspiclkctrl; /* offset 0x258 */ > unsigned int resv121; > unsigned int usb0clkctrl; /* offset 0x260 */ > - unsigned int resv13[103]; > + unsigned int resv122; > + unsigned int usb1clkctrl; /* offset 0x268 */ > + unsigned int resv13[101]; > unsigned int l4lsclkstctrl; /* offset 0x400 */ > unsigned int resv14[7]; > unsigned int l4lsclkctrl; /* offset 0x420 */ > @@ -364,10 +370,14 @@ struct cm_perpll { > unsigned int uart4clkctrl; /* offset 0x598 */ > unsigned int resv35; > unsigned int uart5clkctrl; /* offset 0x5A0 */ > - unsigned int resv36[87]; > + unsigned int resv36[5]; > + unsigned int usbphyocp2scp0clkctrl; /* offset 0x5B8 */ > + unsigned int resv361; > + unsigned int usbphyocp2scp1clkctrl; /* offset 0x5C0 */ > + unsigned int resv3611[79]; > > unsigned int emifclkstctrl; /* offset 0x700 */ > - unsigned int resv361[7]; > + unsigned int resv362[7]; > unsigned int emifclkctrl; /* offset 0x720 */ > unsigned int resv37[3]; > unsigned int emiffwclkctrl; /* offset 0x730 */ > diff --git a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h > b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h index > efdecf4..5f259da 100644 --- > a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h +++ > b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h @@ -72,6 +72,10 > @@ #define USBPHYOCPSCP_MODULE_EN (1 << 1) > #define CM_DEVICE_INST 0x44df4100 > > +#define USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960 (1 << 8) > +#define USBPHY0_CLKCTRL_OPTFCLKEN_CLK32K (1 << 8) > + > + Two blank lines. > /* Control status register */ > #define CTRL_CRYSTAL_FREQ_SRC_MASK (1 << 31) > #define CTRL_CRYSTAL_FREQ_SRC_SHIFT 31 If Marek agrees to correct this minor issues (before adding it to -usb tree), then Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
On Monday, February 16, 2015 at 11:07:39 AM, Lukasz Majewski wrote: > Hi Kishon, > > > Enabled clocks for dwc3 controller and USB PHY present in AM43xx. > > > > Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> > > --- > > > > arch/arm/cpu/armv7/am33xx/clock_am43xx.c | 12 +++++++++++ > > arch/arm/include/asm/arch-am33xx/cpu.h | 22 > > > > ++++++++++++++------ > > arch/arm/include/asm/arch-am33xx/hardware_am43xx.h | 4 ++++ 3 > > files changed, 32 insertions(+), 6 deletions(-) > > > > diff --git a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c > > b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c index 31188c8..252135d > > 100644 --- a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c > > +++ b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c > > @@ -111,9 +111,21 @@ void enable_basic_clocks(void) > > > > &cmper->emifclkctrl, > > &cmper->otfaemifclkctrl, > > &cmper->qspiclkctrl, > > > > + &cmper->usb0clkctrl, > > + &cmper->usbphyocp2scp0clkctrl, > > + &cmper->usb1clkctrl, > > + &cmper->usbphyocp2scp1clkctrl, > > > > 0 > > > > }; > > > > + setbits_le32(&cmper->usb0clkctrl, > > + USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960); > > + setbits_le32(&cmwkup->usbphy0clkctrl, > > + USBPHY0_CLKCTRL_OPTFCLKEN_CLK32K); > > + setbits_le32(&cmper->usb1clkctrl, > > + USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960); > > + setbits_le32(&cmwkup->usbphy1clkctrl, > > + USBPHY0_CLKCTRL_OPTFCLKEN_CLK32K); > > > > do_enable_clocks(clk_domains, clk_modules_explicit_en, 1); > > > > /* Select the Master osc clk as Timer2 clock source */ > > > > diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h > > b/arch/arm/include/asm/arch-am33xx/cpu.h index 8dd69b3..1caa24e 100644 > > --- a/arch/arm/include/asm/arch-am33xx/cpu.h > > +++ b/arch/arm/include/asm/arch-am33xx/cpu.h > > @@ -224,7 +224,11 @@ struct cm_dpll { > > > > struct cm_wkuppll { > > > > unsigned int resv0[136]; > > unsigned int wkl4wkclkctrl; /* offset 0x220 */ > > > > - unsigned int resv1[55]; > > + unsigned int resv1[7]; > > + unsigned int usbphy0clkctrl; /* offset 0x240 */ > > + unsigned int resv112; > > + unsigned int usbphy1clkctrl; /* offset 0x248 */ > > + unsigned int resv113[45]; > > > > unsigned int wkclkstctrl; /* offset 0x300 */ > > unsigned int resv2[15]; > > unsigned int wkup_i2c0ctrl; /* offset 0x340 */ > > > > @@ -275,7 +279,7 @@ struct cm_wkuppll { > > > > unsigned int divm2dplldisp; /* offset 0x630 */ > > > > }; > > > > -/* > > +/*get_sys_clk_freq > > This comment doesn't comply with coding style. > > It should be > > /* > * get_sys_clk_freq > * En ... > > */ > > > * Encapsulating peripheral functional clocks > > * pll registers > > */ > > > > @@ -283,7 +287,7 @@ struct cm_perpll { > > > > unsigned int l3clkstctrl; /* offset 0x00 */ > > unsigned int resv0[7]; > > unsigned int l3clkctrl; /* Offset 0x20 */ > > > > - unsigned int resv1[7]; > > + unsigned int resv112[7]; > > > > unsigned int l3instrclkctrl; /* offset 0x40 */ > > unsigned int resv2[3]; > > unsigned int ocmcramclkctrl; /* offset 0x50 */ > > > > @@ -310,7 +314,9 @@ struct cm_perpll { > > > > unsigned int qspiclkctrl; /* offset 0x258 */ > > unsigned int resv121; > > unsigned int usb0clkctrl; /* offset 0x260 */ > > > > - unsigned int resv13[103]; > > + unsigned int resv122; > > + unsigned int usb1clkctrl; /* offset 0x268 */ > > + unsigned int resv13[101]; > > > > unsigned int l4lsclkstctrl; /* offset 0x400 */ > > unsigned int resv14[7]; > > unsigned int l4lsclkctrl; /* offset 0x420 */ > > > > @@ -364,10 +370,14 @@ struct cm_perpll { > > > > unsigned int uart4clkctrl; /* offset 0x598 */ > > unsigned int resv35; > > unsigned int uart5clkctrl; /* offset 0x5A0 */ > > > > - unsigned int resv36[87]; > > + unsigned int resv36[5]; > > + unsigned int usbphyocp2scp0clkctrl; /* offset 0x5B8 */ > > + unsigned int resv361; > > + unsigned int usbphyocp2scp1clkctrl; /* offset 0x5C0 */ > > + unsigned int resv3611[79]; > > > > unsigned int emifclkstctrl; /* offset 0x700 */ > > > > - unsigned int resv361[7]; > > + unsigned int resv362[7]; > > > > unsigned int emifclkctrl; /* offset 0x720 */ > > unsigned int resv37[3]; > > unsigned int emiffwclkctrl; /* offset 0x730 */ > > > > diff --git a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h > > b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h index > > efdecf4..5f259da 100644 --- > > a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h +++ > > b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h @@ -72,6 +72,10 > > @@ #define USBPHYOCPSCP_MODULE_EN (1 << 1) > > > > #define CM_DEVICE_INST 0x44df4100 > > > > +#define USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960 (1 << 8) > > +#define USBPHY0_CLKCTRL_OPTFCLKEN_CLK32K (1 << 8) > > + > > + > > Two blank lines. > > > /* Control status register */ > > #define CTRL_CRYSTAL_FREQ_SRC_MASK (1 << 31) > > #define CTRL_CRYSTAL_FREQ_SRC_SHIFT 31 > > If Marek agrees to correct this minor issues (before adding it to -usb > tree), then OK, minor issues are pilinng up, so maybe a V2 of the series would be better.
Hi, On Monday 16 February 2015 06:59 PM, Marek Vasut wrote: > On Monday, February 16, 2015 at 11:07:39 AM, Lukasz Majewski wrote: >> Hi Kishon, >> >>> Enabled clocks for dwc3 controller and USB PHY present in AM43xx. >>> >>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> >>> --- >>> >>> arch/arm/cpu/armv7/am33xx/clock_am43xx.c | 12 +++++++++++ >>> arch/arm/include/asm/arch-am33xx/cpu.h | 22 >>> >>> ++++++++++++++------ >>> arch/arm/include/asm/arch-am33xx/hardware_am43xx.h | 4 ++++ 3 >>> files changed, 32 insertions(+), 6 deletions(-) >>> >>> diff --git a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c >>> b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c index 31188c8..252135d >>> 100644 --- a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c >>> +++ b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c >>> @@ -111,9 +111,21 @@ void enable_basic_clocks(void) >>> >>> &cmper->emifclkctrl, >>> &cmper->otfaemifclkctrl, >>> &cmper->qspiclkctrl, >>> >>> + &cmper->usb0clkctrl, >>> + &cmper->usbphyocp2scp0clkctrl, >>> + &cmper->usb1clkctrl, >>> + &cmper->usbphyocp2scp1clkctrl, >>> >>> 0 >>> >>> }; >>> >>> + setbits_le32(&cmper->usb0clkctrl, >>> + USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960); >>> + setbits_le32(&cmwkup->usbphy0clkctrl, >>> + USBPHY0_CLKCTRL_OPTFCLKEN_CLK32K); >>> + setbits_le32(&cmper->usb1clkctrl, >>> + USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960); >>> + setbits_le32(&cmwkup->usbphy1clkctrl, >>> + USBPHY0_CLKCTRL_OPTFCLKEN_CLK32K); >>> >>> do_enable_clocks(clk_domains, clk_modules_explicit_en, 1); >>> >>> /* Select the Master osc clk as Timer2 clock source */ >>> >>> diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h >>> b/arch/arm/include/asm/arch-am33xx/cpu.h index 8dd69b3..1caa24e 100644 >>> --- a/arch/arm/include/asm/arch-am33xx/cpu.h >>> +++ b/arch/arm/include/asm/arch-am33xx/cpu.h >>> @@ -224,7 +224,11 @@ struct cm_dpll { >>> >>> struct cm_wkuppll { >>> >>> unsigned int resv0[136]; >>> unsigned int wkl4wkclkctrl; /* offset 0x220 */ >>> >>> - unsigned int resv1[55]; >>> + unsigned int resv1[7]; >>> + unsigned int usbphy0clkctrl; /* offset 0x240 */ >>> + unsigned int resv112; >>> + unsigned int usbphy1clkctrl; /* offset 0x248 */ >>> + unsigned int resv113[45]; >>> >>> unsigned int wkclkstctrl; /* offset 0x300 */ >>> unsigned int resv2[15]; >>> unsigned int wkup_i2c0ctrl; /* offset 0x340 */ >>> >>> @@ -275,7 +279,7 @@ struct cm_wkuppll { >>> >>> unsigned int divm2dplldisp; /* offset 0x630 */ >>> >>> }; >>> >>> -/* >>> +/*get_sys_clk_freq >> >> This comment doesn't comply with coding style. >> >> It should be >> >> /* >> * get_sys_clk_freq >> * En ... >> >> */ >> >>> * Encapsulating peripheral functional clocks >>> * pll registers >>> */ >>> >>> @@ -283,7 +287,7 @@ struct cm_perpll { >>> >>> unsigned int l3clkstctrl; /* offset 0x00 */ >>> unsigned int resv0[7]; >>> unsigned int l3clkctrl; /* Offset 0x20 */ >>> >>> - unsigned int resv1[7]; >>> + unsigned int resv112[7]; >>> >>> unsigned int l3instrclkctrl; /* offset 0x40 */ >>> unsigned int resv2[3]; >>> unsigned int ocmcramclkctrl; /* offset 0x50 */ >>> >>> @@ -310,7 +314,9 @@ struct cm_perpll { >>> >>> unsigned int qspiclkctrl; /* offset 0x258 */ >>> unsigned int resv121; >>> unsigned int usb0clkctrl; /* offset 0x260 */ >>> >>> - unsigned int resv13[103]; >>> + unsigned int resv122; >>> + unsigned int usb1clkctrl; /* offset 0x268 */ >>> + unsigned int resv13[101]; >>> >>> unsigned int l4lsclkstctrl; /* offset 0x400 */ >>> unsigned int resv14[7]; >>> unsigned int l4lsclkctrl; /* offset 0x420 */ >>> >>> @@ -364,10 +370,14 @@ struct cm_perpll { >>> >>> unsigned int uart4clkctrl; /* offset 0x598 */ >>> unsigned int resv35; >>> unsigned int uart5clkctrl; /* offset 0x5A0 */ >>> >>> - unsigned int resv36[87]; >>> + unsigned int resv36[5]; >>> + unsigned int usbphyocp2scp0clkctrl; /* offset 0x5B8 */ >>> + unsigned int resv361; >>> + unsigned int usbphyocp2scp1clkctrl; /* offset 0x5C0 */ >>> + unsigned int resv3611[79]; >>> >>> unsigned int emifclkstctrl; /* offset 0x700 */ >>> >>> - unsigned int resv361[7]; >>> + unsigned int resv362[7]; >>> >>> unsigned int emifclkctrl; /* offset 0x720 */ >>> unsigned int resv37[3]; >>> unsigned int emiffwclkctrl; /* offset 0x730 */ >>> >>> diff --git a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h >>> b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h index >>> efdecf4..5f259da 100644 --- >>> a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h +++ >>> b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h @@ -72,6 +72,10 >>> @@ #define USBPHYOCPSCP_MODULE_EN (1 << 1) >>> >>> #define CM_DEVICE_INST 0x44df4100 >>> >>> +#define USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960 (1 << 8) >>> +#define USBPHY0_CLKCTRL_OPTFCLKEN_CLK32K (1 << 8) >>> + >>> + >> >> Two blank lines. >> >>> /* Control status register */ >>> #define CTRL_CRYSTAL_FREQ_SRC_MASK (1 << 31) >>> #define CTRL_CRYSTAL_FREQ_SRC_SHIFT 31 >> >> If Marek agrees to correct this minor issues (before adding it to -usb >> tree), then > > OK, minor issues are pilinng up, so maybe a V2 of the series would be better. > sure, I'll fix the comments and send v2. Cheers Kishon
On Friday, February 20, 2015 at 10:30:34 AM, Kishon Vijay Abraham I wrote: > Hi, > > On Monday 16 February 2015 06:59 PM, Marek Vasut wrote: > > On Monday, February 16, 2015 at 11:07:39 AM, Lukasz Majewski wrote: > >> Hi Kishon, [...] > >> Two blank lines. > >> > >>> /* Control status register */ > >>> #define CTRL_CRYSTAL_FREQ_SRC_MASK (1 << 31) > >>> #define CTRL_CRYSTAL_FREQ_SRC_SHIFT 31 > >> > >> If Marek agrees to correct this minor issues (before adding it to -usb > >> tree), then > > > > OK, minor issues are pilinng up, so maybe a V2 of the series would be > > better. > > sure, I'll fix the comments and send v2. Cool, thank you :) Please CC Lukasz and once he says it's OK, I will pick this. Best regards, Marek Vasut
diff --git a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c index 31188c8..252135d 100644 --- a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c +++ b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c @@ -111,9 +111,21 @@ void enable_basic_clocks(void) &cmper->emifclkctrl, &cmper->otfaemifclkctrl, &cmper->qspiclkctrl, + &cmper->usb0clkctrl, + &cmper->usbphyocp2scp0clkctrl, + &cmper->usb1clkctrl, + &cmper->usbphyocp2scp1clkctrl, 0 }; + setbits_le32(&cmper->usb0clkctrl, + USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960); + setbits_le32(&cmwkup->usbphy0clkctrl, + USBPHY0_CLKCTRL_OPTFCLKEN_CLK32K); + setbits_le32(&cmper->usb1clkctrl, + USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960); + setbits_le32(&cmwkup->usbphy1clkctrl, + USBPHY0_CLKCTRL_OPTFCLKEN_CLK32K); do_enable_clocks(clk_domains, clk_modules_explicit_en, 1); /* Select the Master osc clk as Timer2 clock source */ diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h index 8dd69b3..1caa24e 100644 --- a/arch/arm/include/asm/arch-am33xx/cpu.h +++ b/arch/arm/include/asm/arch-am33xx/cpu.h @@ -224,7 +224,11 @@ struct cm_dpll { struct cm_wkuppll { unsigned int resv0[136]; unsigned int wkl4wkclkctrl; /* offset 0x220 */ - unsigned int resv1[55]; + unsigned int resv1[7]; + unsigned int usbphy0clkctrl; /* offset 0x240 */ + unsigned int resv112; + unsigned int usbphy1clkctrl; /* offset 0x248 */ + unsigned int resv113[45]; unsigned int wkclkstctrl; /* offset 0x300 */ unsigned int resv2[15]; unsigned int wkup_i2c0ctrl; /* offset 0x340 */ @@ -275,7 +279,7 @@ struct cm_wkuppll { unsigned int divm2dplldisp; /* offset 0x630 */ }; -/* +/*get_sys_clk_freq * Encapsulating peripheral functional clocks * pll registers */ @@ -283,7 +287,7 @@ struct cm_perpll { unsigned int l3clkstctrl; /* offset 0x00 */ unsigned int resv0[7]; unsigned int l3clkctrl; /* Offset 0x20 */ - unsigned int resv1[7]; + unsigned int resv112[7]; unsigned int l3instrclkctrl; /* offset 0x40 */ unsigned int resv2[3]; unsigned int ocmcramclkctrl; /* offset 0x50 */ @@ -310,7 +314,9 @@ struct cm_perpll { unsigned int qspiclkctrl; /* offset 0x258 */ unsigned int resv121; unsigned int usb0clkctrl; /* offset 0x260 */ - unsigned int resv13[103]; + unsigned int resv122; + unsigned int usb1clkctrl; /* offset 0x268 */ + unsigned int resv13[101]; unsigned int l4lsclkstctrl; /* offset 0x400 */ unsigned int resv14[7]; unsigned int l4lsclkctrl; /* offset 0x420 */ @@ -364,10 +370,14 @@ struct cm_perpll { unsigned int uart4clkctrl; /* offset 0x598 */ unsigned int resv35; unsigned int uart5clkctrl; /* offset 0x5A0 */ - unsigned int resv36[87]; + unsigned int resv36[5]; + unsigned int usbphyocp2scp0clkctrl; /* offset 0x5B8 */ + unsigned int resv361; + unsigned int usbphyocp2scp1clkctrl; /* offset 0x5C0 */ + unsigned int resv3611[79]; unsigned int emifclkstctrl; /* offset 0x700 */ - unsigned int resv361[7]; + unsigned int resv362[7]; unsigned int emifclkctrl; /* offset 0x720 */ unsigned int resv37[3]; unsigned int emiffwclkctrl; /* offset 0x730 */ diff --git a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h index efdecf4..5f259da 100644 --- a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h +++ b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h @@ -72,6 +72,10 @@ #define USBPHYOCPSCP_MODULE_EN (1 << 1) #define CM_DEVICE_INST 0x44df4100 +#define USBOTGSSX_CLKCTRL_OPTFCLKEN_REFCLK960 (1 << 8) +#define USBPHY0_CLKCTRL_OPTFCLKEN_CLK32K (1 << 8) + + /* Control status register */ #define CTRL_CRYSTAL_FREQ_SRC_MASK (1 << 31) #define CTRL_CRYSTAL_FREQ_SRC_SHIFT 31
Enabled clocks for dwc3 controller and USB PHY present in AM43xx. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> --- arch/arm/cpu/armv7/am33xx/clock_am43xx.c | 12 +++++++++++ arch/arm/include/asm/arch-am33xx/cpu.h | 22 ++++++++++++++------ arch/arm/include/asm/arch-am33xx/hardware_am43xx.h | 4 ++++ 3 files changed, 32 insertions(+), 6 deletions(-)