From patchwork Sat Jan 31 22:27:07 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Siarhei Siamashka X-Patchwork-Id: 435193 X-Patchwork-Delegate: hdegoede@redhat.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 238BE140283 for ; Sun, 1 Feb 2015 09:27:44 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3B1A84A044; Sat, 31 Jan 2015 23:27:36 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id UOBW5OgWrxSC; Sat, 31 Jan 2015 23:27:36 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3EB394B5D3; Sat, 31 Jan 2015 23:27:25 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E5E164A033 for ; Sat, 31 Jan 2015 23:27:15 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id AoWUba1BVsbo for ; Sat, 31 Jan 2015 23:27:15 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-la0-f45.google.com (mail-la0-f45.google.com [209.85.215.45]) by theia.denx.de (Postfix) with ESMTPS id 9DE144A039 for ; Sat, 31 Jan 2015 23:27:15 +0100 (CET) Received: by mail-la0-f45.google.com with SMTP id gd6so30818139lab.4 for ; Sat, 31 Jan 2015 14:27:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=OD7vPlRYcaf0x9Vio2XMz0TFZajM6ATL4Dbj+v7mVfY=; b=r4R62dwK3r05H9Cbz1ua/DUzJdy5GKURDJPSzSS8mY9itUPIKVwdSZaZXuSH0rMVEH ot+yZzYBqv90VmtOTOF2xYRVG/Grh2BfcboQXJKYl19in2CGJpuq/eKP7Ha5ZD0aStcM jYRXwNdETrkAixHIzDuGgid59qjCgyiqdk0parsDjAMsA1CJ8ZwdhdOON3tk+1HIVxAx 797mq7uXzsvttkx3mbM9lce0dfPduGQPjKY9/pdBnhTLDuKoFkVb0xirurHWdf8v66AC sEi/oKchyWnp2eeQV2087eH2XW5bfjZQpAjDALwVfisubHylZyQ1ErcOnas73vYxY/VY cszA== X-Received: by 10.152.8.1 with SMTP id n1mr12190578laa.47.1422743234926; Sat, 31 Jan 2015 14:27:14 -0800 (PST) Received: from localhost.localdomain (85-76-74-251-nat.elisa-mobile.fi. [85.76.74.251]) by mx.google.com with ESMTPSA id ld6sm1422414lbc.22.2015.01.31.14.27.13 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 31 Jan 2015 14:27:14 -0800 (PST) From: Siarhei Siamashka To: u-boot@lists.denx.de Date: Sun, 1 Feb 2015 00:27:07 +0200 Message-Id: <1422743227-24097-4-git-send-email-siarhei.siamashka@gmail.com> X-Mailer: git-send-email 2.0.5 In-Reply-To: <1422743227-24097-1-git-send-email-siarhei.siamashka@gmail.com> References: <1422743227-24097-1-git-send-email-siarhei.siamashka@gmail.com> Cc: Ian Campbell Subject: [U-Boot] [PATCH 3/3] sunxi: dram: Allow to configure vdd-dll voltage on sun[457]i X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Higher vdd-dll voltage allows to use higher dram and mbus clock speeds. The vdd-int/vdd-dll voltage is currently set to 1.25V by default, which is much lower than 1.4V, allowed by datasheets (the exact maximum differs for different SoCs). There are different use cases. For a tablet, it may be preferable to favor longer battery life and use lower dram clock speed & voltage. But for non-battery powered devices, especially the ones driving full-hd monitors, memory performance may be a lot more important than the power consumption. A configurable vdd-dll voltage provides better flexibility. Signed-off-by: Siarhei Siamashka --- arch/arm/include/asm/arch-sunxi/dram.h | 1 + arch/arm/include/asm/arch-sunxi/dram_sun4i.h | 1 + board/sunxi/Kconfig | 8 ++++++++ board/sunxi/board.c | 10 +++++++++- board/sunxi/dram_sun4i_auto.c | 6 ++++++ board/sunxi/dram_sun5i_auto.c | 7 +++++++ 6 files changed, 32 insertions(+), 1 deletion(-) diff --git a/arch/arm/include/asm/arch-sunxi/dram.h b/arch/arm/include/asm/arch-sunxi/dram.h index 7ff43e6..61ed77c 100644 --- a/arch/arm/include/asm/arch-sunxi/dram.h +++ b/arch/arm/include/asm/arch-sunxi/dram.h @@ -25,6 +25,7 @@ #endif unsigned long sunxi_dram_init(void); +u32 sunxi_dram_get_min_dll_volt(void); /* * Wait up to 1s for value to be set in given part of reg. diff --git a/arch/arm/include/asm/arch-sunxi/dram_sun4i.h b/arch/arm/include/asm/arch-sunxi/dram_sun4i.h index 40c385a..32493cc 100644 --- a/arch/arm/include/asm/arch-sunxi/dram_sun4i.h +++ b/arch/arm/include/asm/arch-sunxi/dram_sun4i.h @@ -88,6 +88,7 @@ struct dram_para { u32 emr3; u32 dqs_gating_delay; u32 active_windowing; + u32 min_dll_volt; }; #define DRAM_CCR_COMMAND_RATE_1T (0x1 << 5) diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 4a21589..3092edc 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -99,6 +99,14 @@ config DRAM_DQS_GATING_DELAY is usually good enough, unless running at really high DRAM clocks speeds (up to 600MHz). If unsure, keep as 0. +config DRAM_MIN_DLL_VOLT + int "sunxi dram odt_en value" + default 1250 + ---help--- + Set the minimum VDD-DLL/VDD-INT voltage (mV), required for + reliable DRAM operation. On Allwinner A10/A13/A20 devices with + AXP209 PMIC it is provided from DCDC3. + choice prompt "sunxi dram timings" default DRAM_TIMINGS_VENDOR_MAGIC diff --git a/board/sunxi/board.c b/board/sunxi/board.c index b70e00c..ce6aef5 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -154,11 +154,19 @@ void i2c_init_board(void) clock_twi_onoff(0, 1); } +__weak u32 sunxi_dram_get_min_dll_volt(void) +{ + return 0; +} + #ifdef CONFIG_SPL_BUILD void sunxi_board_init(void) { int power_failed = 0; unsigned long ramsize; + u32 min_dll_volt = sunxi_dram_get_min_dll_volt(); + if (min_dll_volt < 1250) + min_dll_volt = 1250; #ifdef CONFIG_AXP152_POWER power_failed = axp152_init(); @@ -170,7 +178,7 @@ void sunxi_board_init(void) #ifdef CONFIG_AXP209_POWER power_failed |= axp209_init(); power_failed |= axp209_set_dcdc2(1400); - power_failed |= axp209_set_dcdc3(1250); + power_failed |= axp209_set_dcdc3(min_dll_volt); power_failed |= axp209_set_ldo2(3000); power_failed |= axp209_set_ldo3(2800); power_failed |= axp209_set_ldo4(2800); diff --git a/board/sunxi/dram_sun4i_auto.c b/board/sunxi/dram_sun4i_auto.c index 09e0c9a..c0c8a28 100644 --- a/board/sunxi/dram_sun4i_auto.c +++ b/board/sunxi/dram_sun4i_auto.c @@ -27,9 +27,15 @@ static struct dram_para dram_para = { .emr1 = CONFIG_DRAM_EMR1, .emr3 = 0, .dqs_gating_delay = CONFIG_DRAM_DQS_GATING_DELAY, + .min_dll_volt = CONFIG_DRAM_MIN_DLL_VOLT, }; unsigned long sunxi_dram_init(void) { return dramc_init(&dram_para); } + +u32 sunxi_dram_get_min_dll_volt(void) +{ + return dram_para.min_dll_volt; +} diff --git a/board/sunxi/dram_sun5i_auto.c b/board/sunxi/dram_sun5i_auto.c index e52d54c..30febe5 100644 --- a/board/sunxi/dram_sun5i_auto.c +++ b/board/sunxi/dram_sun5i_auto.c @@ -30,9 +30,16 @@ static struct dram_para dram_para = { .emr1 = CONFIG_DRAM_EMR1, .emr3 = 0, .dqs_gating_delay = CONFIG_DRAM_DQS_GATING_DELAY, + .min_dll_volt = CONFIG_DRAM_MIN_DLL_VOLT, }; unsigned long sunxi_dram_init(void) { return dramc_init(&dram_para); } + + +u32 sunxi_dram_get_min_dll_volt(void) +{ + return dram_para.min_dll_volt; +}